Navab Singh focuses on Optoelectronics, Nanowire, Transistor, MOSFET and Condensed matter physics. His Optoelectronics research integrates issues from Threshold voltage, Electrical engineering and Resistive random-access memory. His work carried out in the field of Nanowire brings together such families of science as Field-effect transistor, Quantum tunnelling, CMOS and Silicon.
His Transistor research is multidisciplinary, relying on both Crystallography, Oxide, Logic gate and Silicon-germanium. His MOSFET research focuses on subjects like Silicon on insulator, which are linked to p–n junction. His Brillouin zone study, which is part of a larger body of work in Condensed matter physics, is frequently linked to Magnetic hysteresis and Magnetization, bridging the gap between disciplines.
His primary areas of study are Optoelectronics, Nanowire, Condensed matter physics, Nanotechnology and CMOS. His research in Optoelectronics intersects with topics in Transistor, MOSFET and Electrical engineering. His research integrates issues of Nanoelectronics, Electronic engineering, Logic gate, Non-volatile memory and Quantum tunnelling in his study of Nanowire.
His Ferromagnetism study in the realm of Condensed matter physics connects with subjects such as Magnetic hysteresis, Magnetization, Magnetic anisotropy and Micromagnetics. His work focuses on many connections between Nanotechnology and other disciplines, such as Lithography, that overlap with his field of interest in Phase-shift mask and Nanostructure. Navab Singh interconnects Doping and Voltage in the investigation of issues within Silicon.
The scientist’s investigation covers issues in Optoelectronics, Wafer, CMOS, Immersion lithography and Microelectromechanical systems. His study in Optoelectronics is interdisciplinary in nature, drawing from both Electronic circuit and Nitride. The concepts of his Wafer study are interwoven with issues in Electron-beam lithography, Scanning electron microscope, Optics, Subtractive color and Nanomaterials.
His CMOS study also includes fields such as
His scientific interests lie mostly in Wafer, Optoelectronics, Immersion lithography, CMOS and Optics. His Wafer research incorporates elements of Electron-beam lithography, Nanomaterials, Scanning electron microscope and Subtractive color. In his work, Nanotechnology is strongly intertwined with Lithography, which is a subfield of Nanomaterials.
His Optoelectronics research includes elements of Resistive random-access memory and X-ray photoelectron spectroscopy. His biological study deals with issues like Wavelength, which deal with fields such as Laser beams, Silicon, Nanostructure fabrication and Physical vapor deposition. The CMOS study combines topics in areas such as Polarizer, Polarization, Waveplate and Half wave.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
High-performance fully depleted silicon nanowire (diameter /spl les/ 5 nm) gate-all-around CMOS devices
N. Singh;A. Agarwal;L.K. Bera;T.Y. Liow.
IEEE Electron Device Letters (2006)
High-performance fully depleted silicon nanowire (diameter /spl les/ 5 nm) gate-all-around CMOS devices
N. Singh;A. Agarwal;L.K. Bera;T.Y. Liow.
IEEE Electron Device Letters (2006)
Silicon Nanowire Arrays for Label-Free Detection of DNA
Zhiqiang Gao;Ajay Agarwal;Alastair D Trigg;Navab Singh.
Analytical Chemistry (2007)
Silicon Nanowire Arrays for Label-Free Detection of DNA
Zhiqiang Gao;Ajay Agarwal;Alastair D Trigg;Navab Singh.
Analytical Chemistry (2007)
DNA sensing by silicon nanowire: charge layer distance dependence.
Guo-Jun Zhang;Gang Zhang;Jay Huiyi Chua;Ru-Ern Chee.
Nano Letters (2008)
DNA sensing by silicon nanowire: charge layer distance dependence.
Guo-Jun Zhang;Gang Zhang;Jay Huiyi Chua;Ru-Ern Chee.
Nano Letters (2008)
Stacked silicon-germanium nanowire structure and method of forming the same
Guo Qiang Lo;Lakshmi Kanta Bera;Hoai Son Nguyen;Navab Singh.
(2006)
Stacked silicon-germanium nanowire structure and method of forming the same
Guo Qiang Lo;Lakshmi Kanta Bera;Hoai Son Nguyen;Navab Singh.
(2006)
Vertical Si-Nanowire $n$ -Type Tunneling FETs With Low Subthreshold Swing ( $\leq \hbox{50}\ \hbox{mV/decade}$ ) at Room Temperature
R Gandhi;Zhixian Chen;N Singh;K Banerjee.
IEEE Electron Device Letters (2011)
Vertical Si-Nanowire $n$ -Type Tunneling FETs With Low Subthreshold Swing ( $\leq \hbox{50}\ \hbox{mV/decade}$ ) at Room Temperature
R Gandhi;Zhixian Chen;N Singh;K Banerjee.
IEEE Electron Device Letters (2011)
If you think any of the details on this page are incorrect, let us know.
We appreciate your kind effort to assist us to improve this page, it would be helpful providing us with as much detail as possible in the text box below:
Agency for Science, Technology and Research
Agency for Science, Technology and Research
National University of Singapore
Advanced Micro Foundry
Sungkyunkwan University
University of Bologna
South China University of Technology
National University of Singapore
Zhejiang University
Carnegie Mellon University
Graduate Institute of International and Development Studies
Technion – Israel Institute of Technology
General Electric (United States)
Technical University of Denmark
Argonne National Laboratory
Henan University
Rush University Medical Center
University of Tennessee Medical Center
University of Iowa
James Cook University
North Carolina State University
University of Toyama
Inserm : Institut national de la santé et de la recherche médicale
University of Pisa
University of Birmingham
University of Colorado Boulder