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Michael H. Perrott

Michael H. Perrott

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
39
Citations
7244
World Ranking
4647
National Ranking
1634

Overview

Michael H. Perrott is affiliated with Invensense in the United States.

There are no records of recent papers, frequent co-authors, or publication venues associated with Michael H. Perrott in the accessible data.

No book publications or specific fields, subfields, or main topics of study have been documented for this researcher in the current dataset.

There are also no awards listed or known for Michael H. Perrott based on the available information.

Given the limited available data, the profile focuses primarily on the affiliation and acknowledges the absence of detailed research outputs or collaborations in the accessible records.

Best Publications

  • Photonic ADC: overcoming the bottleneck of electronic jitter.

    Anatol Khilo;Steven J Spector;Matthew E Grein;Amir H Nejadmalayeri

  • A 12-Bit, 10-MHz Bandwidth, Continuous-Time $\Sigma\Delta$ ADC With a 5-Bit, 950-MS/s VCO-Based Quantizer

    M.Z. Straayer;M.H. Perrott

  • A Multi-Path Gated Ring Oscillator TDC With First-Order Noise Shaping

    M.Z. Straayer;M.H. Perrott

  • A Low-Noise Wide-BW 3.6-GHz Digital $\Delta\Sigma$ Fractional-N Frequency Synthesizer With a Noise-Shaping Time-to-Digital Converter and Quantization Noise Cancellation

    Chun-Ming Hsu;M.Z. Straayer;M.H. Perrott

  • A modeling approach for /spl Sigma/-/spl Delta/ fractional-N frequency synthesizers allowing straightforward noise analysis

    M.H. Perrott;M.D. Trott;C.G. Sodini

  • A 27-mW CMOS fractional-N synthesizer using digital compensation for 2.5-Mb/s GFSK modulation

    M.H. Perrott;T.L. Tewksbury;C.G. Sodini

  • Digital compensation for wideband modulation of a phase locked loop frequency synthesizer

    Michael H. Perrott;Charles G. Sodini;Anantha P. Chandrakasan

  • A 12-Bit, 10-MHz Bandwidth, Continuous-Time ΣΔ ADC With a 5-Bit, 950-MS/s VCO-Based Quantizer

    Matthew Z. Straayer;Michael H. Perrott

  • Digitally-synthesized loop filter method and circuit particularly useful for a phase locked loop

    Michael H. Perrott;Rex T. Baird;Yunteng Huang

  • A 78 dB SNDR 87 mW 20 MHz Bandwidth Continuous-Time $\Delta\Sigma$ ADC With VCO-Based Integrator and Quantizer Implemented in 0.13 $\mu$m CMOS

    Unknown

  • A 1-MHZ bandwidth 3.6-GHz 0.18-/spl mu/m CMOS fractional-N synthesizer utilizing a hybrid PFD/DAC structure for reduced broadband phase noise

    S.E. Meninger;M.H. Perrott

  • A Low-Noise, Wide-BW 3.6GHz Digital ΔΣ Fractional-N Frequency Synthesizer with a Noise-Shaping Time-to-Digital Converter and Quantization Noise Cancellation

    Chun-Ming Hsu;M.Z. Straayer;M.H. Perrott

  • Fast and accurate behavioral simulation of fractional-N frequency synthesizers and other PLL/DLL circuits

    Michael H. Perrott

  • Photonic subsampling analog-to-digital conversion of microwave signals at 40-GHz with higher than 7-ENOB resolution

    Jungwon Kim;Matthew J. Park;Michael H. Perrott;Franz X. Kärtner

  • A Highly Digital MDLL-Based Clock Multiplier That Leverages a Self-Scrambling Time-to-Digital Converter to Achieve Subpicosecond Jitter Performance

    Belal M. Helal;Matthew Z. Straayer;Gu-Yeon Wei;Michael H. Perrott

  • A Low Jitter Programmable Clock Multiplier Based on a Pulse Injection-Locked Oscillator With a Highly-Digital Tuning Loop

    B.M. Helal;Chun-Ming Hsu;K. Johnson;M.H. Perrott

  • An efficient approach to ARMA modeling of biological systems with multiple inputs and delays

    M. H. Perrott;R. J. Cohen

  • A Temperature-to-Digital Converter for a MEMS-Based Programmable Oscillator With $ Frequency Stability and $ Integrated Jitter

    M. H. Perrott;J. C. Salvia;F. S. Lee;A. Partridge

  • An integrated 2.5 GHz /spl Sigma//spl Delta/ frequency synthesizer with 5 /spl mu/s settling and 2 Mb/s closed loop modulation

    M. Perrott;B. Setterberg;A. Grzegorek;B. McFarland

  • An efficient high-resolution 11-bit noise-shaping multipath gated ring oscillator TDC

    M.Z. Straayer;M.H. Perrott

  • A 1-MHZ bandwidth 3.6-GHz 0.18-μm CMOS fractional-N synthesizer utilizing a hybrid PFD/DAC structure for reduced broadband phase noise

    Scott E. Meninger;Michael H. Perrott

  • A Highly Digital MDLL-Based Clock Multiplier That Leverages a Self-Scrambling Time-to-Digital Converter to Achieve Subpicosecond

    Belal M. Helal;Matthew Z. Straayer;Gu-Yeon Wei;Michael H. Perrott

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