World's Best Scientists 2026 revealed!

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
39
Citations
12403
World Ranking
4582
National Ranking
1616

Overview

Krisztian Flautner is affiliated with the University of Michigan-Ann Arbor in the United States. Their research activity centers primarily within the field of computer science, with significant contributions to artificial intelligence, computer networks and communications, information systems, and computer vision and pattern recognition.

Their scholarly output includes a range of publications, notably in venues such as arXiv (Cornell University), IEEE Computer Architecture Letters, and the Proceedings of the ACM on Programming Languages. These platforms have featured several of their recent works, including:

  • The Jaseci Programming Paradigm and Runtime Stack: Building Scale-Out Production Applications Easy and Fast, 2023, IEEE Computer Architecture Letters
  • Scaling Down to Scale Up: A Cost-Benefit Analysis of Replacing OpenAI's LLM with Open Source SLMs in Production, 2023, arXiv (Cornell University)
  • The Jaseci Programming Paradigm and Runtime Stack: Building Scale-out Production Applications Easy and Fast, 2023, arXiv (Cornell University)
  • Label Agnostic Pre-training for Zero-shot Text Classification, 2023, arXiv (Cornell University)
  • Ranking Unraveled: Recipes for LLM Rankings in Head-to-Head AI Combat, 2024, arXiv (Cornell University)

Their research covers a variety of topics, including but not limited to:

  • Topic Modeling
  • Natural Language Processing Techniques
  • Software System Performance and Reliability
  • Cloud Computing and Resource Management
  • Scientific Computing and Data Management
  • Advanced Graph Neural Networks
  • Distributed systems and fault tolerance

Co-authorship has played a notable role in their work, collaborating frequently with researchers such as Jason Mars, Lingjia Tang, Yiping Kang, Ashish Mahendra, and Savini Kashmira. These collaborations have contributed to multiple publications concentrated around core themes of large-scale system design, AI paradigms, and performance optimization.

Flautner's frequent publication venues include:

  • arXiv (Cornell University)
  • IEEE Computer Architecture Letters
  • Proceedings of the ACM on Programming Languages

Their academic contributions predominantly advance the domains of artificial intelligence and computer science, engaging deeply with methods to improve system scalability, resource management, and performance reliability through innovative programming paradigms and AI-driven techniques.

Best Publications

  • Razor: a low-power pipeline based on circuit-level timing speculation

    Dan Ernst;Nam Sung Kim;Shidhartha Das;Sanjay Pant

  • Leakage current: Moore's law meets static power

    N.S. Kim;T. Austin;D. Baauw;T. Mudge

  • Drowsy caches: simple techniques for reducing leakage power

    Krisztián Flautner;Nam Sung Kim;Steve Martin;David Blaauw

  • Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads

    Steven M. Martin;Krisztian Flautner;Trevor Mudge;David Blaauw

  • Automatic performance setting for dynamic voltage scaling

    Krisztián Flautner;Steve Reinhardt;Trevor Mudge

  • A self-tuning DVS processor using delay-error detection and correction

    S. Das;D. Roberts;Seokwoo Lee;S. Pant

  • Theoretical and practical limits of dynamic voltage scaling

    Bo Zhai;David Blaauw;Dennis Sylvester;Krisztian Flautner

  • Razor: circuit-level correction of timing errors for low-power operation

    D. Ernst;S. Das;S. Lee;D. Blaauw

  • SODA: A Low-power Architecture For Software Radio

    Yuan Lin;Hyunseok Lee;Mark Woh;Yoav Harel

  • PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor

    Taeho Kgil;Shaun D'Souza;Ali Saidi;Nathan Binkert

  • Circuit and microarchitectural techniques for reducing cache leakage power

    Nam Sung Kim;K. Flautner;D. Blaauw;T. Mudge

  • Vertigo: automatic performance-setting for Linux

    Krisztián Flautner;Trevor Mudge

  • Drowsy instruction caches. Leakage power reduction using dynamic voltage scaling and cache sub-bank prediction

    Nam Sung Kim;Krisztián Flautner;David Blaauw;Trevor Mudge

  • Correction to “A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation”

    David Bull;Shidhartha Das;Karthik Shivashankar;Ganesh S. Dasika

  • Making typical silicon matter with Razor

    T. Austin;D. Blaauw;T. Mudge;K. Flautner

  • The limit of dynamic voltage scaling and insomniac dynamic voltage scaling

    Bo Zhai;D. Blaauw;D. Sylvester;K. Flautner

  • SODA: A High-Performance DSP Architecture for Software-Defined Radio

    Y. Lin;H. Lee;M. Woh;Y. Harel

  • From SODA to scotch: The evolution of a wireless baseband processor

    Mark Woh;Yuan Lin;Sangwon Seo;Scott Mahlke

  • AnySP: anytime anywhere anyway signal processing

    Mark Woh;Sangwon Seo;Scott Mahlke;Trevor Mudge

  • A self-tuning DVS processor using delay-error detection and correction

    S. Das;Sanjay Pant;D. Roberts;Seokwoo Lee

  • AnySP: Anytime Anywhere Anyway Signal Processing

    M. Woh;Sangwon Seo;S. Mahlke;T. Mudge

Frequent Co-Authors

Trevor Mudge
Trevor Mudge University of Michigan–Ann Arbor
David Blaauw
David Blaauw University of Michigan–Ann Arbor
Todd Austin
Todd Austin University of Michigan–Ann Arbor
Nam Sung Kim
Nam Sung Kim University of Illinois at Urbana-Champaign
Dennis Sylvester
Dennis Sylvester University of Michigan–Ann Arbor
Chaitali Chakrabarti
Chaitali Chakrabarti Arizona State University
Mary Jane Irwin
Mary Jane Irwin Pennsylvania State University
Mahmut Kandemir
Mahmut Kandemir Pennsylvania State University

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Related Online Degrees & Career Pathways

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