Kiyoo Itoh

Research.com Recognitions

• 2006 - IEEE Jun-ichi Nishizawa Medal "For pioneering contributions to dynamic random access memory (DRAM) cell structures and architecture.”
• 1993 - IEEE Donald O. Pederson Award in Solid-State Circuits "For technical contributions to folded data-line circuits and the development of high-density dynamic RAMs."

Overview

Best Publications

• Semiconductor integrated circuit device having power reduction mechanism

  Masashi Horiguchi;Kunio Uchiyama;Kiyoo Itoh;Takeshi Sakata

  350
  Citations

• An experimental 1.5-V 64-Mb DRAM

  Y. Nakagome;H. Tanaka;K. Takeuchi;E. Kume

  298
  Citations

• Semiconductor memory cell and method of forming same

  Hideyuki Matsuoka;Kiyoo Itoh;Motoyasu Terao;Satoru Hanzawa

  292
  Citations

• VLSI Memory Chip Design

  Kiyoo Itoh

  209
  Citations

• Review and future prospects of low-voltage RAM circuits

  Y. Nakagome;M. Horiguchi;T. Kawahara;K. Itoh

  170
  Citations

• Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions

  Takao Watanabe;Ryoichi Hori;Goro Kitsukawa;Yoshiki Kawajiri

  159
  Citations

• A corrugated capacitor cell (CCC) for megabit dynamic MOS memories

  H. Sunami;T. Kure;N. Hashimoto;K. Itoh

  145
  Citations

• Limitations and challenges of multigigabit DRAM chip design

  K. Itoh;Y. Nakagome;S. Kimura;T. Watanabe

  140
  Citations

• Semiconductor circuit with low power consumption having emitter-coupled logic or differential amplifier

  Goro Kitsukawa;Kazumasa Yanagisawa;Takayuki Kawahara;Ryoichi Hori

  140
  Citations

• SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND ITS OPERATION METHOD, ESPECIALLY INCLUDING SERVAL SWITCHING MOSFETS FOR CONTROLLING DRIVING CURRENT SEQUENTLY

  Noda Hiromasa;Aoki Masakazu;Idei Youji;Kajigaya Kazuhiko

  139
  Citations

• Crown-shaped stacked-capacitor cell for 1.5-V operation 64-Mb DRAMs

  T. Kaga;T. Kure;H. Shinriki;Y. Kawamoto

  138
  Citations

• Semiconductor integrated circuits with power reduction mechanism

  Takeshi Sakata;Kiyoo Itoh;Masashi Horiguchi

  134
  Citations

• Static random access memory having a memory cell operating voltage larger than an operating voltage of a peripheral circuit

  Kiyoo Itoh;Koichiro Ishibashi

  134
  Citations

• Large scale integrated circuit for low voltage operation

  Jun Etoh;Kiyoo Itoh;Yoshiki Kawajiri;Yoshinobu Nakagome

  125
  Citations

• Semiconductor integrated circuit including voltage converter effective at low operational voltages

  Hitoshi Tanaka;Masakazu Aoki;Kiyoo Itoh

  123
  Citations

• Large scale integrated circuit with sense amplifier circuits for low voltage operation

  Jun Etoh;Kiyoo Itoh;Yoshiki Kawajiri;Yoshinobu Nakagome

  114
  Citations

• Semiconductor memory device having separately biased wells for isolation

  Shinji Nakazato;Hideaki Uchida;Yoshikasu Saito;Masahiro Yamamura

  114
  Citations

• Semiconductor integrated circuit device comprising a memory array and a processing circuit

  Takao Watanabe;Katsutaka Kimura;Kiyoo Itoh;Yoshiki Kawajiri

  107
  Citations

• The impact of data-line interference noise on DRAM scaling

  Y. Nakagome;M. Aoki;S. Ikenaga;M. Horiguchi

  103
  Citations

• Controllable conduction device

  Kazuo Nakazato;Kiyoo Itoh;Hiroshi Mizuta;Toshikazu Shimada

  98
  Citations

• Semiconductor device including interface circuit, logic circuit, and static memory array having transistors of various threshold voltages and being supplied with various supply voltages

  Kiyoo Itoh;Hiroyuki Mizuno

  98
  Citations

• Semiconductor device having a reference voltage generating circuit

  Masashi Horiguchi;Masakazu Aoki;Kiyoo Itoh;Yoshinobu Nakagome

  93
  Citations