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David J. Corisis

David J. Corisis

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
34
Citations
6071
World Ranking
5726
National Ranking
1949

Overview

What is he best known for?

The fields of study he is best known for:

  • Electrical engineering
  • Integrated circuit
  • Mechanical engineering

David J. Corisis mainly investigates Optoelectronics, Electrical engineering, Lead frame, Die and Electronic engineering. His Optoelectronics research is multidisciplinary, incorporating perspectives in Die, Electrical conductor and Ball grid array. His Electrical engineering study frequently draws connections to adjacent fields such as Plane.

David J. Corisis has researched Lead frame in several fields, including Quad Flat No-leads package, Engineering drawing, Frame, Paddle and Integrated circuit. David J. Corisis usually deals with Die and limits it to topics linked to Printed circuit board and Molding and Structural engineering. His work in Active surface tackles topics such as Lead which are related to areas like Chip.

His most cited work include:

  • Stackable ball grid array package (332 citations)
  • Stacked mass storage flash memory package (287 citations)
  • Apparatus and methods of packaging and testing die (206 citations)

What are the main themes of his work throughout his whole career to date?

David J. Corisis spends much of his time researching Optoelectronics, Semiconductor device, Die, Electronic engineering and Electrical conductor. His studies deal with areas such as Structural engineering, Substrate, Interposer and Chip as well as Optoelectronics. His work on Lead frame is typically connected to Redistribution and Offset as part of general Semiconductor device study, connecting several disciplines of science.

As part of the same scientific family, he usually focuses on Die, concentrating on Paddle and intersecting with Frame and Manufacturing process. His Electronic engineering research is multidisciplinary, incorporating elements of Buffer, Capacitance, Ball grid array and Integrated circuit packaging. In general Electrical conductor, his work in Contact pad is often linked to Fabrication linking many areas of study.

He most often published in these fields:

  • Optoelectronics (52.35%)
  • Semiconductor device (35.88%)
  • Die (34.12%)

What were the highlights of his more recent work (between 2009-2020)?

  • Optoelectronics (52.35%)
  • Electrical conductor (31.76%)
  • Integrated circuit (22.35%)

In recent papers he was focusing on the following fields of study:

The scientist’s investigation covers issues in Optoelectronics, Electrical conductor, Integrated circuit, Electronic engineering and Microelectronics. His Optoelectronics study incorporates themes from Semiconductor device and Substrate, Interposer. His Substrate research incorporates themes from Lead frame, Semiconductor components, Adhesive, Terminal and Signal.

His research in Integrated circuit intersects with topics in Quad Flat No-leads package, Mechanical engineering, Die, Riser card and Diagnostic board. His Mechanical engineering research focuses on Computer hardware and how it relates to Aperture, Circuit design, Integrated circuit packaging and Printed circuit board. His research on Microelectronics concerns the broader Electrical engineering.

Between 2009 and 2020, his most popular works were:

  • Stacked microelectronic dies and methods for stacking microelectronic dies (154 citations)
  • Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices (104 citations)
  • Integrated circuit package support system (35 citations)

In his most recent research, the most cited papers focused on:

  • Electrical engineering
  • Integrated circuit
  • Mechanical engineering

David J. Corisis mainly focuses on Electrical engineering, Optoelectronics, Microelectronics, Interconnection and Die. His study in the field of Electrical conductor and Integrated circuit also crosses realms of Planar. His Optoelectronics research integrates issues from Signal and Substrate.

David J. Corisis integrates Interconnection with Electronic engineering in his research. David J. Corisis integrates Die and Stacking in his studies.

Best Publications

  • Stackable ball grid array package

    David J. Corisis;Jerry M. Brooks;Walter L. Moden

  • Semiconductor devices including semiconductor dice in laterally offset stacked arrangement

    Leonard E. Mess;Jerry M. Brooks;David J. Corisis

  • Apparatus and methods of packaging and testing die

    Leonard E. Mess;David J. Corisis;Walter L. Moden;Larry D. Kinsman

  • Stackable ceramic fbga for high thermal applications

    Walter L. Moden;David J. Corisis;Leonard E. Mess;Larry D. Kinsman

  • Microelectronic devices, stacked microelectronic devices, and methods for manufacturing such devices

    David J. Corisis;Chin Hui Chong;Choon Kuan Lee

  • Stacked microelectronic dies and methods for stacking microelectronic dies

    David J. Corisis

  • Multi-part lead frame with dissimilar materials

    S. Hinkle;Jerry Brooks;David Corisis

  • Module assembly and method for stacked BGA packages

    David J. Corisis;Walter L. Moden;Leonard E. Mess;Larry D. Kinsman

  • Semiconductor package having downset leadframe for reducing package bow

    David J. Corisis

  • Leads under chip IC package

    David J. Corisis

  • Integrated circuit package alignment feature

    David J. Corisis;Tracy Reynolds;Michael Slaughter;Daniel Cram

  • Methods for transverse hybrid LOC package

    David J. Corisis

  • Modular sockets using flexible interconnects

    Warren M. Farnworth;David J. Corisis;Salman Akram

  • Interconnect for packaging semiconductor dice and fabricating BGA packages

    David Corisis;Walter Moden

  • Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices

    Choon Kuan Lee;Chin Hui Chong;David J. Corisis

  • Lead frame assemblies with voltage reference plane and IC packages including same

    David J. Corisis;Jerry M. Brooks;Terry R. Lee

  • High speed IC package configuration

    David J. Corisis;Brent Keeth

  • Semiconductor card and method of fabrication

    David J. Corisis;Todd O. Bolken

  • Circuit and substrate encapsulation methods

    Todd O. Bolken;Cary J. Baerlocher;David J. Corisis;Chad A. Cobbley

  • Controlling packaging encapsulant leakage

    Patrick W. Tandy;Joseph M. Brand;Brad D. Rumsey;Steven R. Stephenson

Frequent Co-Authors

Larry D. Kinsman
Larry D. Kinsman OmniVision Technologies (United States)
Salman Akram
Salman Akram Micron (United States)
Brent Keeth
Brent Keeth Micron (United States)

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