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Computer Science

D-Index
56
Citations
17389
World Ranking
3986
National Ranking
1897

Research.com Recognitions

  • 1994 - IEEE Fellow For contributions to VLSI and system level design methodologies and CAD tools.

Overview

Daniel D. Gajski is affiliated with the University of California, Irvine in the United States. Their research career has involved contributions primarily in the areas of VLSI and system-level design methodologies.

In 1994, Daniel D. Gajski was recognized as an IEEE Fellow for contributions to VLSI and system-level design methodologies and CAD tools.

Although detailed information on their recent papers, co-authors, frequent publication venues, books, fields of study, subfields, and specific topics of work is not provided, the award highlights a focus on design automation and integrated circuit design technology. This suggests an expertise in computer-aided design (CAD) tools related to hardware systems and integrated circuits.

Best Publications

  • High ― Level Synthesis: Introduction to Chip and System Design

    Daniel D. Gajski;Nikil D. Dutt;Allen C.-H. Wu;Steve Y.-L. Lin

  • High — Level Synthesis

    Daniel D. Gajski;Nikil D. Dutt;Allen C-H Wu;Steve Y-L Lin

  • Hypertool: a programming aid for message-passing systems

    M.-Y. Wu;D.D. Gajski

  • Specification and Design of Embedded Systems

    Daniel D. Gajski;Frank Vahid;Sanjiv Narayan;Jie Gong

  • SPECC: Specification Language and Methodology

    Daniel D. Gajski

  • Transaction level modeling: an overview

    Lukai Cai;Daniel Gajski

  • An Introduction to High-Level Synthesis

    P. Coussy;D.D. Gajski;M. Meredith;A. Takach

  • Cedar—a large scale multiprocessor

    D Gajski;D Kuck;D Lawrie;A Sameh

  • Principles of Digital Design

    Daniel D. Gajski

  • Embedded System Design: Modeling, Synthesis and Verification

    Daniel D. Gajski;Samar Abdi;Andreas Gerstlauer;Gunar Schirner

  • Specification and design of embedded hardware-software systems

    D.D. Gajski;F. Vahid

  • An Introduction to High-Level Synthesis

    Unknown

  • Electronic System-Level Synthesis Methodologies

    A. Gerstlauer;C. Haubelt;A.D. Pimentel;T.P. Stefanov

  • RTOS Modeling for System Level Design

    Andreas Gerstlauer;Haobo Yu;Daniel D. Gajski

  • Design Tools for Intelligent Silicon Compilation

    B.M. Pangrle;D.D. Gajski

  • System Design: A Practical Guide with SpecC

    Daniel D. Gajski;Rainer Domer;Junyu Peng;Andreas Gerstlauer

  • A binary-constraint search algorithm for minimizing hardware during hardware/software partitioning

    Frank Vahid;Daniel D. Gajski;Jie Gong

  • Percolation based synthesis

    Roni Potasman;Joseph Lis;Alexandru Nicolau;Daniel Gajski

  • Specification partitioning for system design

    F. Vahid;D. D. Gajski

  • System-on-chip environment: a SpecC-based framework for heterogeneous MPSoC design

    Rainer Dömer;Andreas Gerstlauer;Junyu Peng;Dongwan Shin

  • SpecSyn: an environment supporting the specify-explore-refine paradigm for hardware/software system design

    D.D. Gajski;F. Vahid;S. Narayan;Jie Gong

Frequent Co-Authors

Andreas Gerstlauer
Andreas Gerstlauer The University of Texas at Austin
Frank Vahid
Frank Vahid University of California, Riverside
Nikil Dutt
Nikil Dutt University of California, Irvine
David J. Kuck
David J. Kuck University of Illinois at Urbana-Champaign
Ahmed Sameh
Ahmed Sameh Purdue University West Lafayette
Peter Marwedel
Peter Marwedel TU Dortmund University
Min-You Wu
Min-You Wu Shanghai Jiao Tong University
Alexandru Nicolau
Alexandru Nicolau University of California, Irvine
Rajesh Gupta
Rajesh Gupta University of California, San Diego
Fadi J. Kurdahi
Fadi J. Kurdahi University of California, Irvine

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