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Julien Ryckaert

Julien Ryckaert

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
40
Citations
6294
World Ranking
4516
National Ranking
96

Overview

Julien Ryckaert is affiliated with Imec in Belgium and specializes in the field of engineering, particularly within electrical and electronic engineering. Their research spans a wide array of topics including semiconductor materials and devices, advancements in semiconductor devices and circuit design, low-power high-performance VLSI design, 3D IC and TSV technologies, ferroelectric and negative capacitance devices, integrated circuits and semiconductor failure analysis, and VLSI and analog circuit testing.

Their publication record demonstrates active contribution to several leading venues in electronics and semiconductor research. Frequent publication outlets include:

  • IEEE Transactions on Electron Devices
  • 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • arXiv (Cornell University)
  • 2022 International Electron Devices Meeting (IEDM)

Julien's recent papers cover topics central to nanoscale semiconductor device technology and system design, including:

  • A Comprehensive Study of Nanosheet and Forksheet SRAM for Beyond N5 Node (2021, IEEE Transactions on Electron Devices)
  • PPAC of sheet-based CFET configurations for 4 track design with 16nm metal pitch (2022, 2022 IEEE Symposium on VLSI Technology and Circuits)
  • A Benchmark Study of Complementary-Field Effect Transistor (CFET) Process Integration Options Done by Virtual Fabrication (2020, IEEE Journal of the Electron Devices Society)
  • CFET SRAM DTCO, Interconnect Guideline, and Benchmark for CMOS Scaling (2023, IEEE Transactions on Electron Devices)
  • The Complementary FET (CFET) 6T-SRAM (2021, IEEE Transactions on Electron Devices)

Their work often involves collaboration with a focused group of co-authors, including:

  • Geert Hellings
  • Pieter Weckx
  • P. Schuddinck
  • A. Veloso
  • Shairfe Muhammad Salahuddin

Julien Ryckaert's research primarily contributes to advancing knowledge in semiconductor materials and devices, with a particular emphasis on complementary field-effect transistor (CFET) technologies and SRAM design. Their publications reflect an ongoing engagement with challenges surrounding transistor scalability, circuit design, and device benchmarking within the context of emerging semiconductor fabrication nodes.

Best Publications

  • Ultra-wideband channel model for communication around the human body

    A. Fort;J. Ryckaert;C. Desset;P. De Doncker

  • Channel model for wireless communication around human body

    J. Ryckaert;P. De Doncker;R. Meys;A. de Le Hoye

  • Ultra-wide-band transmitter for low-power wireless body area networks: design and evaluation

    J. Ryckaert;C. Desset;A. Fort;M. Badaroglu

  • Human++: autonomous wireless sensors for body area networks

    B. Gyselinckx;C. Van Hoof;J. Ryckaert;R.F. Yazicioglu

  • The Complementary FET (CFET) for CMOS scaling beyond N3

    J. Ryckaert;P. Schuddinck;P. Weckx;G. Bouche

  • Characterization of the ultra wideband body area propagation channel

    A. Fort;C. Desset;J. Ryckaert;P. De Doncker

  • A 0.65-to-1.4 nJ/Burst 3-to-10 GHz UWB All-Digital TX in 90 nm CMOS for IEEE 802.15.4a

    J. Ryckaert;G. Van der Plas;V. De Heyn;C. Desset

  • A 2-mm $^{2}$ 0.1–5 GHz Software-Defined Radio Receiver in 45-nm Digital CMOS

    V. Giannini;P. Nuzzo;C. Soens;K. Vengattaramane

  • Human++: Emerging Technology for Body Area Networks

    Bert Gyselinckx;Ruud Vullers;Chris Van Hoof;Julien Ryckaert

  • Ultra wide-band body area channel model

    A. Fort;C. Desset;J. Ryckaert;P. De Doncker

  • Future Logic Scaling: Towards Atomic Channels and Deconstructed Chips

    S. B. Samavedam;J. Ryckaert;E. Beyne;K. Ronse

  • A 2.4 GHz Low-Power Sixth-Order RF Bandpass $\Delta\Sigma$ Converter in CMOS

    J. Ryckaert;J. Borremans;B. Verbruggen;L. Bos

  • Design technology co-optimization for a robust 10nm Metal1 solution for logic design and SRAM

    Boris Vandewalle;Bharani Chava;Sushil Sakhare;Julien Ryckaert

  • Novel forksheet device architecture as ultimate logic scaling device towards 2nm

    P. Weckx;M. Gupta;Y. Oniki;L.-A. Ragnarsson

  • First Monolithic Integration of 3D Complementary FET (CFET) on 300mm Wafers

    S. Subramanian;M. Hosseini;T. Chiarella;S. Sarkar

  • A CMOS Ultra-Wideband Receiver for Low Data-Rate Communication

    J. Ryckaert;M. Verhelst;M. Badaroglu;S. D'Amico

  • SOP integration and codesign of antennas

    S. Brebels;J. Ryckaert;B. Come;S. Donnay

  • RF-to-Baseband Digitization in 40 nm CMOS With RF Bandpass $\Delta\Sigma$ Modulator and Polyphase Decimation Filter

    E. Martens;A. Bourdoux;A. Couvreur;R. Fasthuber

  • Multirate Cascaded Discrete-Time Low-Pass ΔΣ Modulator for GSM/Bluetooth/UMTS

    Lynn Bos;Gerd Vandersteen;Pieter Rombouts;Arnd Geis

  • Enabling Sub-5nm CMOS Technology Scaling Thinner and Taller!

    J. Ryckaert;R. Baert;D. Verkest;M. H. Na

  • A 16mA UWB 3-to-5GHz 20Mpulses/s Quadrature Analog Correlation Receiver in 0.18/spl mu/m CMOS

    J. Ryckaert;M. Badaroglu;V. De Heyn;G. Van der Plas

  • Challenges and opportunities in applying grapho-epitaxy DSA lithography to metal cut and contact/via applications

    Yuansheng Ma;J. Andres Torres;Germain Fenger;Yuri Granik

  • Implementation of templated DSA for via layer patterning at the 7nm node

    Roel Gronheid;Jan Doise;Jan Doise;Joost Bekaert;Boon Teik Chan

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