World's Best Scientists 2026 revealed!

D-Index & Metrics

Computer Science

D-Index
37
Citations
12305
World Ranking
10465
National Ranking
4376

Research.com Recognitions

  • 2020 - IEEE Fellow For contributions to the development of secure hardware circuits and processors

Overview

G. Edward Suh is affiliated with Cornell University in the United States. Their body of work largely centers around computer science, with a focus on artificial intelligence, signal processing, computer vision and pattern recognition, computer networks and communications, and hardware and architecture.

The scientist's research topics include:

  • Adversarial Robustness in Machine Learning
  • Advanced Malware Detection Techniques
  • Security and Verification in Computing
  • Privacy-Preserving Technologies in Data
  • Cryptographic Implementations and Security
  • Scientific Computing and Data Management
  • Artificial Intelligence in Healthcare and Education

Frequent coauthors of G. Edward Suh include Weizhe Hua, Zhiru Zhang, Benjamin Wu, Aaron B. Wagner, and P.-S. Huang.

The scientist has contributed to a range of publication venues, notably:

  • arXiv (Cornell University)
  • IEEE Design and Test
  • bioRxiv (Cold Spring Harbor Laboratory)
  • Proceedings of the 59th ACM/IEEE Design Automation Conference
  • IEEE Transactions on Dependable and Secure Computing

Some recent representative papers authored or coauthored by G. Edward Suh include:

  • GuardNN, 2022, Proceedings of the 59th ACM/IEEE Design Automation Conference
  • Precision Gating: Improving Neural Network Efficiency with Dynamic Dual-Precision Activations, 2020, arXiv (Cornell University)
  • BulletTrain: Accelerating Robust Neural Network Training via Boundary Example Mining, 2021, arXiv (Cornell University)
  • Remote Power Side-Channel Attacks on FPGAs, 2024, IEEE Design and Test
  • Reverse-Engineering CNN Models Using Side-Channel Attacks, 2022, IEEE Design and Test

G. Edward Suh was named an IEEE Fellow in 2020 for contributions to the development of secure hardware circuits and processors.

Best Publications

  • Physical unclonable functions for device authentication and secret key generation

    G. Edward Suh;Srinivas Devadas

  • Extracting secret keys from integrated circuits

    Daihyun Lim;J.W. Lee;B. Gassend;G.E. Suh

  • Secure program execution via dynamic information flow tracking

    G. Edward Suh;Jae W. Lee;David Zhang;Srinivas Devadas

  • AEGIS: architecture for tamper-evident and tamper-resistant processing

    G. Edward Suh;Dwaine Clarke;Blaise Gassend;Marten van Dijk

  • Dynamic Partitioning of Shared Cache Memory

    G. E. Suh;L. Rudolph;S. Devadas

  • A new memory monitoring scheme for memory-aware scheduling and partitioning

    G.E. Suh;S. Devadas;L. Rudolph

  • Caches and hash trees for efficient memory integrity verification

    B. Gassend;G.E. Suh;D. Clarke;M. van Dijk

  • Efficient memory integrity verification and encryption for secure processors

    G. Edward Suh;Dwaine Clarke;Blaise Gassend;Marten van Dijk

  • FPGA-Based Remote Power Side-Channel Attacks

    Mark Zhao;G. Edward Suh

  • Design and Implementation of the AEGIS Single-Chip Secure Processor Using Physical Random Functions

    G. Edward Suh;Charles W. O'Donnell;Ishan Sachdev;Srinivas Devadas

  • A Hardware Design Language for Timing-Sensitive Information-Flow Security

    Danfeng Zhang;Yao Wang;G. Edward Suh;Andrew C. Myers

  • Analytical cache models with applications to cache partitioning

    G. Edward Suh;Srinivas Devadas;Larry Rudolph

  • AEGIS: A single-chip secure processor

    G. Edward Suh;Charles W. O'Donnell;Srinivas Devadas

  • Sinan: ML-based and QoS-aware resource management for cloud microservices

    Yanqi Zhang;Weizhe Hua;Zhuangzhuang Zhou;G. Edward Suh

  • Adaptive reduction parallelization techniques

    Unknown

  • Reverse engineering convolutional neural networks through side-channel information leaks

    Weizhe Hua;Zhiru Zhang;G. Edward Suh

  • Flash Memory for Ubiquitous Hardware Security Functions: True Random Number Generation and Device Fingerprints

    Yinglei Wang;Wing-kei Yu;Shuo Wu;G. Malysa

  • Channel Gating Neural Networks

    Weizhe Hua;Yuan Zhou;Christopher M. De Sa;Zhiru Zhang

  • Efficient Timing Channel Protection for On-Chip Networks

    Yao Wang;G. Edward Suh

  • Incremental Multiset Hash Functions and Their Application to Memory Integrity Checking

    Dwaine E. Clarke;Srinivas Devadas;Marten van Dijk;Blaise Gassend

  • Timing channel protection for a shared memory controller

    Yao Wang;Andrew Ferraiuolo;G. Edward Suh

  • Extracting device fingerprints from flash memory by exploiting physical variations

    Pravin Prabhu;Ameen Akel;Laura M. Grupp;Wing-Kei S. Yu

  • TWiCe: preventing row-hammering by exploiting time window counters

    Eojin Lee;Ingab Kang;Sukhan Lee;G. Edward Suh

Frequent Co-Authors

Andrew C. Myers
Andrew C. Myers Cornell University
Marten van Dijk
Marten van Dijk University of Connecticut
Edwin C. Kan
Edwin C. Kan Cornell University
Mark Campbell
Mark Campbell Cornell University
Jung Ho Ahn
Jung Ho Ahn Seoul National University
Tuo-Hung Hou
Tuo-Hung Hou National Yang Ming Chiao Tung University
Khurram K. Afridi
Khurram K. Afridi Cornell University
David Zhang
David Zhang Chinese University of Hong Kong, Shenzhen

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