1999 - ACM Fellow For contributions to VLSI CAD test, and Fault-tolerant Systems Design, including leadership in computer engineering, and computer science education and research.
His primary areas of investigation include Algorithm, Combinational logic, Fault tolerance, Parallel computing and Multiprocessing. The study incorporates disciplines such as Signature, Overhead and Built-in self-test in addition to Algorithm. His Combinational logic research includes elements of Sequential logic and Logic optimization.
Distributed computing covers Dhiraj K. Pradhan research in Fault tolerance. His Parallel computing research is multidisciplinary, relying on both Reed–Muller code and Hamming distance. Dhiraj K. Pradhan combines subjects such as Scheme, Fragmentation, Resource allocation and Shared memory with his study of Multiprocessing.
Dhiraj K. Pradhan mostly deals with Electronic engineering, Algorithm, Fault tolerance, Parallel computing and Embedded system. The Electronic engineering study combines topics in areas such as Transistor and Electronic circuit. His Algorithm study integrates concerns from other disciplines, such as Automatic test pattern generation, Fault coverage and Finite field.
His Fault tolerance study incorporates themes from Fault, Redundancy and Reliability. His biological study spans a wide range of topics, including Overhead, Binary tree and Very-large-scale integration. The concepts of his Logic optimization study are interwoven with issues in Combinational logic, Theoretical computer science and Sequential logic.
The scientist’s investigation covers issues in Electronic engineering, Fault tolerance, Embedded system, Static random-access memory and Memristor. His Electronic engineering course of study focuses on Electronic circuit and Algorithm and Circuit reliability. The various areas that he examines in his Algorithm study include Bit error rate and Arithmetic.
His Fault tolerance study introduces a deeper knowledge of Reliability engineering. Dhiraj K. Pradhan combines subjects such as Overhead and Transient with his study of Embedded system. Dhiraj K. Pradhan has included themes like Distributed computing and De Bruijn sequence in his Wireless sensor network study.
Dhiraj K. Pradhan spends much of his time researching Electronic engineering, Fault tolerance, Memristor, Error detection and correction and Static random-access memory. His Electronic engineering research includes elements of Node, Low-power electronics and Parallel computing. His Fault tolerance study combines topics from a wide range of disciplines, such as Spice, Reliability, Emphasis, Fault and Efficient energy use.
His Error detection and correction research is multidisciplinary, incorporating elements of Hamming code, Decoding methods, Computer engineering and Arithmetic. His work deals with themes such as Transistor, Process variation, Random access and Leakage, which intersect with Static random-access memory. His study in Distributed computing is interdisciplinary in nature, drawing from both Link-state routing protocol, Zone Routing Protocol, Dynamic Source Routing, Static routing and Computer network.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
Fault-tolerant computer system design
Dhiraj K. Pradhan.
(1996)
A cluster-based approach for routing in dynamic networks
P. Krishna;N. H. Vaidya;M. Chatterjee;D. K. Pradhan.
acm special interest group on data communication (1997)
The de Bruijn multiprocessor network: a versatile parallel processing and sorting network for VLSI
Maheswara R. Samatham;Dhiraj K. Pradhan.
IEEE Transactions on Computers (1989)
Fault-tolerant computing : theory and techniques
Dhiraj K. Pradhan;Jacob A. Abraham.
(1986)
Improving performance of TCP over wireless networks
B.S. Bakshi;P. Krishna;N.H. Vaidya;D.K. Pradhan.
international conference on distributed computing systems (1997)
Fault injection: a method for validating computer-system dependability
J.A. Clark;D.K. Pradhan.
IEEE Computer (1995)
Recursive learning: a new implication technique for efficient solutions to CAD problems-test, verification, and optimization
W. Kunz;D.K. Pradhan.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1994)
Consensus with dual failure modes
F.J. Meyer;D.K. Pradhan.
IEEE Transactions on Parallel and Distributed Systems (1991)
Recursive Learning: An attractive alternative to the decision tree for test generation in digital ci
W. Kunz;D.K. Pradhan.
international test conference (1992)
Recoverable mobile environment: design and trade-off analysis
D.K. Pradhan;P. Krishna;N.H. Vaidya.
ieee international symposium on fault tolerant computing (1996)
Profile was last updated on December 6th, 2021.
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