Lap Chan

Overview

Best Publications

• Method of fabricating CMOS devices featuring dual gate structures and a high dielectric constant gate insulator layer

  Cher Liang Cha;Alex See;Lap Chan

  361
  Citations

• Creation of a self-aligned, ion implanted channel region, after source and drain formation

  Teck Koon Lee;Lap Chan;Chock H. Gan;Po-Ching Liu

  243
  Citations

• Method for shallow trench isolation

  Jia Zhen Zheng;Charlie Wee Song Tay;Wei Lu;Lap Chan

  164
  Citations

• Passivation of copper interconnect surfaces with a passivating metal layer

  Lap Chan;Kuan Pei Yap;Kheng Chok Tee;Flora S. Ip

  144
  Citations

• Device physics and guiding principles for the design of double-gate tunneling field effect transistor with silicon-germanium source heterojunction

  Eng-Huat Toh;Grace Huiqi Wang;Lap Chan;Ganesh Samudra

  140
  Citations

• New salicidation technology with Ni(Pt) alloy for MOSFETs

  P.S. Lee;K.L. Pey;D. Mangelinck;J. Ding

  137
  Citations

• Method to form a self-aligned CMOS inverter using vertical device integration

  Ravi Sundaresan;Yang Pan;James Yong Meng Lee;Ying Keung Leung

  137
  Citations

• Antifuse structure and method for manufacturing it

  Jiazhen Zheng;Lap Chan

  135
  Citations

• A method to form a transistor with multiple threshold voltages using a combination of different work function gate materials

  Lap Chan;Elgin Quek;Ravi Sundaresan;Yang Pan

  125
  Citations

• Device Design and Scalability of a Double-Gate Tunneling Field-Effect Transistor with Silicon–Germanium Source

  Eng Huat Toh;Grace Huiqi Wang;Lap Chan;Dennis Sylvester

  124
  Citations

• Laser curing of spin-on dielectric thin films

  Chee Tee Chua;Yuan-Ping Lee;Mei Sheng Zhou;Lap Chan

  116
  Citations

• Back gate contact for silicon on insulator technology

  Chan Lap;Sundaresan Ravishankar;Wei Che Chia

  112
  Citations

• Annealing of ultrashallow p+/n junction by 248 nm excimer laser and rapid thermal processing with different preamorphization depths

  Y. F. Chong;K. L. Pey;A. T. S. Wee;A. See

  108
  Citations

• Method to form, and structure of, a dual damascene interconnect device

  Shyue Fong Quek;Ting Cheong Ang;Lap Chan;Sang Yee Loong

  106
  Citations

• Method for fabricating semiconductor devices with reduced junction diffusion

  Benjamin Colombeau;Sai Hooi Yeong;Francis Benistant;Bangun Indajang

  105
  Citations

• Method for making improved shallow trench isolation for semiconductor integrated circuits

  Poh Suan Tan;Lap Chan;Qinghua Zhong;Qian Gang

  98
  Citations

• Nitrogen-enhanced negative bias temperature instability: An insight by experiment and first-principle calculations

  Shyue Seng Tan;T. P. Chen;Jia Mei Soon;Kian Ping Loh

  98
  Citations

• Method for fabricating a MOS device

  Lap Chan;Ting Cheong Ang;Shyue Pong Quek;Sang Yee Loong

  94
  Citations

• Method for a short channel CMOS transistor with small overlay capacitance using in-situ doped spacers with a low dielectric constant

  Randall Cher Liang Cha;Tae Jong Lee;Alex See;Lap Chan

  88
  Citations

• Nanocrystal flash memory device and manufacturing method therefor

  Wee Kiong Choi;Wai Kin Chim;Vivian Ng;Lap Chan

  87
  Citations