World's Best Scientists 2026 revealed!

D-Index & Metrics

Computer Science

D-Index
41
Citations
7551
World Ranking
8813
National Ranking
90

Research.com Recognitions

  • 2017 - IEEE Fellow For contribution to low-power, real-time, and reconfigurable systems

Overview

Kiyoung Choi is affiliated with Seoul National University in South Korea. Their research spans multiple fields, including physics, astronomy, and engineering, with a particular focus on statistical and nonlinear physics, electrical and electronic engineering, and artificial intelligence. Their work also touches on computer networks, communications, and cognitive neuroscience.

Their main topics of study encompass neural networks and reservoir computing, nonlinear dynamics and pattern formation, neural dynamics and brain function, theoretical and computational physics, quantum many-body systems, advanced thermodynamics and statistical mechanics, and complex network analysis techniques.

Kiyoung Choi has published papers in various scientific journals. Notable recent papers include:

  • "Exploring nonlinear dynamics and network structures in Kuramoto systems using machine learning approaches," 2023, Chaos An Interdisciplinary Journal of Nonlinear Science
  • "Machine learning approach to percolation transitions: global information," 2023, Journal of Statistical Mechanics Theory and Experiment
  • "A hybrid percolation transition at a finite transition point in scale-free networks," 2021, Chaos An Interdisciplinary Journal of Nonlinear Science
  • "Analysis of Microstrip Line with Asymmetric Arch Type Cross-Sectional Structure Using Micro Pattern Transfer Printing Method," 2022, Sensors

Frequent publication venues for Kiyoung Choi include:

  • Chaos An Interdisciplinary Journal of Nonlinear Science
  • Journal of Statistical Mechanics Theory and Experiment
  • Sensors

The scientist frequently collaborates with several co-authors, including:

  • B. Kahng
  • Soo Min Oh
  • Je Ung Song
  • Wonjun Choi
  • Seungmin Woo

Kiyoung Choi received the IEEE Fellow award in 2017 for contributions to low-power, real-time, and reconfigurable systems.

Best Publications

  • A scalable processing-in-memory accelerator for parallel graph processing

    Junwhan Ahn;Sungpack Hong;Sungjoo Yoo;Onur Mutlu

  • PIM-enabled instructions: a low-overhead, locality-aware processing-in-memory architecture

    Junwhan Ahn;Sungjoo Yoo;Onur Mutlu;Kiyoung Choi

  • Power conscious fixed priority scheduling for hard real-time systems

    Youngsoo Shin;Kiyoung Choi

  • Power optimization of real-time embedded systems on variable speed processors

    Youngsoo Shin;Kiyoung Choi;Takayasu Sakurai

  • Dynamic energy-accuracy trade-off using stochastic computing in deep neural networks

    Kyounghoon Kim;Jungki Kim;Joonsang Yu;Jungwoo Seo

  • Partial bus-invert coding for power optimization of application-specific systems

    Youngsoo Shin;Soo-Ik Chae;Kiyoung Choi

  • Deep neural networks with weighted spikes

    Jaehyun Kim;Heesu Kim;Subin Huh;Jinho Lee

  • Resource Sharing and Pipelining in Coarse-Grained Reconfigurable Architecture for Domain-Specific Optimization

    Yoonjin Kim;Mary Kiemb;Chulsoo Park;Jinyong Jung

  • Power minimization of functional units by partially guarded computation

    Junghwan Choi;Jinhwan Jeon;Kiyoung Choi

  • Compilation approach for coarse-grained reconfigurable architectures

    Jong-eun Lee;Kiyoung Choi;N.D. Dutt

  • Efficient FPGA acceleration of Convolutional Neural Networks using logical-3D compute array

    Atul Rahman;Jongeun Lee;Kiyoung Choi

  • DASCA: Dead Write Prediction Assisted STT-RAM Cache Architecture

    Junwhan Ahn;Sungjoo Yoo;Kiyoung Choi

  • Partial bus-invert coding for power optimization of system level bus

    Youngsoo Shin;Soo-Ik Chae;Kiyoung Choi

  • Efficient instruction encoding for automatic instruction set design of configurable ASIPs

    Jong-eun Lee;Kiyoung Choi;Nikil Dutt

  • Instruction set synthesis with efficient instruction encoding for configurable processors

    Jong-Eun Lee;Kiyoung Choi;Nikil D. Dutt

  • Behavior-to-placed RTL synthesis with performance-driven placement

    Daehong Kim;Jinyong Jung;Sunghyun Lee;Jinhwan Jeon

  • Mapping Multi-Domain Applications Onto Coarse-Grained Reconfigurable Architectures

    Ganghee Lee;Kiyoung Choi;Nikil D Dutt

  • A spatial mapping algorithm for heterogeneous coarse-grained reconfigurable architectures

    Minwook Ahn;J.W. Yoon;Yunheung Paek;Yoonjin Kim

  • Implementation of floating-point operations for 3D graphics on a coarse-grained reconfigurable architecture

    Manhwee Jo;V.K. Prasad Arava;Hoonmo Yang;Kiyoung Choi

  • An algorithm for mapping loops onto coarse-grained reconfigurable architectures

    Jong-eun Lee;Kiyoung Choi;Nikil D. Dutt

  • PIM-Enabled Instructions: A Low-Overhead, Locality-Aware

    Ahn Sungjoo Yoo;Onur Mutlu;Kiyoung Choi

Frequent Co-Authors

Xiaolin Wang
Xiaolin Wang University of Wollongong
Nikil Dutt
Nikil Dutt University of California, Irvine
Shi Xue Dou
Shi Xue Dou University of Wollongong
Je-Geun Park
Je-Geun Park Seoul National University
Soonhoi Ha
Soonhoi Ha Seoul National University
Jianguo Zhu
Jianguo Zhu University of Sydney
Bae Ho Park
Bae Ho Park Konkuk University
Xun Shi
Xun Shi Chinese Academy of Sciences
Maxim Avdeev
Maxim Avdeev Australian Nuclear Science and Technology Organisation

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