2017 - IEEE Fellow For contribution to low-power, real-time, and reconfigurable systems
Kiyoung Choi focuses on Computer architecture, Embedded system, Warm dark matter, Particle physics and Dark matter. His Computer architecture research is multidisciplinary, incorporating elements of Field-programmable gate array, Reduced instruction set computing, Memory architecture and Hybrid Memory Cube. As part of one scientific family, Kiyoung Choi deals mainly with the area of Hybrid Memory Cube, narrowing it down to issues related to the Scalability, and often Efficient energy use.
Kiyoung Choi has included themes like Software, Computer hardware, Interconnection and Overhead in his Embedded system study. In his papers, he integrates diverse fields, such as Warm dark matter, Axino, Supersymmetry, Axion, Astrophysics and Dark radiation. His work carried out in the field of Axino brings together such families of science as Yukawa potential, Quantum chromodynamics, Cold dark matter, Hierarchy problem and Strong CP problem.
Kiyoung Choi spends much of his time researching Embedded system, Parallel computing, Computer architecture, Condensed matter physics and Computer hardware. His Embedded system study combines topics in areas such as Software, Overhead and Scheduling. His Scheduling research focuses on Dynamic priority scheduling in particular.
His research on Parallel computing frequently links to adjacent areas such as High-level synthesis. He integrates many fields in his works, including Computer architecture and Flexibility. His work deals with themes such as Single crystal and Electrical resistivity and conductivity, which intersect with Condensed matter physics.
The scientist’s investigation covers issues in Artificial neural network, Convolutional neural network, Artificial intelligence, Condensed matter physics and Horticulture. His Artificial neural network research incorporates elements of Algorithm, Efficient energy use and Memory management. His biological study spans a wide range of topics, including Machine learning, Overhead and Pattern recognition.
His Condensed matter physics research is multidisciplinary, incorporating elements of Field and Charge. His Bandwidth research incorporates themes from Embedded system and Memory bandwidth. His study in the field of Many core is also linked to topics like Programming paradigm.
His scientific interests lie mostly in Convolutional neural network, Artificial neural network, Efficient energy use, Energy consumption and Stochastic computing. Kiyoung Choi has researched Convolutional neural network in several fields, including Field-programmable gate array, Hardware acceleration, Computer architecture and System on a chip. His study with Field-programmable gate array involves better knowledge in Embedded system.
Kiyoung Choi works in the field of Computer architecture, focusing on Very long instruction word in particular. The study incorporates disciplines such as Algorithm and Pattern recognition in addition to Artificial neural network. His studies deal with areas such as Radio frequency, Kernel, Static random-access memory and Parallel computing as well as Efficient energy use.
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A scalable processing-in-memory accelerator for parallel graph processing
Junwhan Ahn;Sungpack Hong;Sungjoo Yoo;Onur Mutlu.
international symposium on computer architecture (2015)
Power conscious fixed priority scheduling for hard real-time systems
Youngsoo Shin;Kiyoung Choi.
design automation conference (1999)
PIM-enabled instructions: a low-overhead, locality-aware processing-in-memory architecture
Junwhan Ahn;Sungjoo Yoo;Onur Mutlu;Kiyoung Choi.
international symposium on computer architecture (2015)
Power optimization of real-time embedded systems on variable speed processors
Youngsoo Shin;Kiyoung Choi;Takayasu Sakurai.
international conference on computer aided design (2000)
Dynamic energy-accuracy trade-off using stochastic computing in deep neural networks
Kyounghoon Kim;Jungki Kim;Joonsang Yu;Jungwoo Seo.
design automation conference (2016)
Partial bus-invert coding for power optimization of application-specific systems
Youngsoo Shin;Soo-Ik Chae;Kiyoung Choi.
IEEE Transactions on Very Large Scale Integration Systems (2001)
Resource Sharing and Pipelining in Coarse-Grained Reconfigurable Architecture for Domain-Specific Optimization
Yoonjin Kim;Mary Kiemb;Chulsoo Park;Jinyong Jung.
design, automation, and test in europe (2005)
Power minimization of functional units by partially guarded computation
Junghwan Choi;Jinhwan Jeon;Kiyoung Choi.
international symposium on low power electronics and design (2000)
Compilation approach for coarse-grained reconfigurable architectures
Jong-eun Lee;Kiyoung Choi;N.D. Dutt.
IEEE Design & Test of Computers (2003)
Partial bus-invert coding for power optimization of system level bus
Youngsoo Shin;Soo-Ik Chae;Kiyoung Choi.
international symposium on low power electronics and design (1998)
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