Gary D. Hachtel spends much of his time researching Algorithm, Sequential logic, Theoretical computer science, Logic synthesis and Logic optimization. Quadratic assignment problem is the focus of his Algorithm research. His Sequential logic study incorporates themes from Finite-state machine, Programming language, Data structure and Product.
His work carried out in the field of Theoretical computer science brings together such families of science as Tree traversal, State and Boolean algebra. His Logic synthesis research incorporates themes from Very-large-scale integration, Quine–McCluskey algorithm, Boole's expansion theorem and Implicant. His research in Logic optimization intersects with topics in Register-transfer level, Boolean circuit and Combinational logic.
His main research concerns Algorithm, Theoretical computer science, Sequential logic, Finite-state machine and Boolean function. His Algorithm research is multidisciplinary, incorporating elements of Set and Minification. Gary D. Hachtel has included themes like Boolean circuit, Enumeration, Boolean algebra, Logic synthesis and Graph in his Theoretical computer science study.
Gary D. Hachtel works in the field of Logic synthesis, namely Logic optimization. His study looks at the intersection of Sequential logic and topics like Automatic test pattern generation with Speedup. When carried out as part of a general Finite-state machine research project, his work on Richards controller is frequently linked to work in Markov chain, therefore connecting diverse disciplines of study.
Gary D. Hachtel focuses on Model checking, Algorithm, Theoretical computer science, Computation and Formal verification. His work in Model checking covers topics such as Set which are related to areas like Resolution and Property. His studies in Algorithm integrate themes in fields like Abstract data type and Heuristic.
His work in Theoretical computer science tackles topics such as Boolean function which are related to areas like Variable and Boolean satisfiability problem. His Formal verification study combines topics in areas such as Discrete mathematics, Fragment and Binary decision diagram. Gary D. Hachtel interconnects Sequential logic, Logic synthesis, Boolean circuit and Boolean algebra in the investigation of issues within Combinational logic.
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Logic Minimization Algorithms for VLSI Synthesis
Robert King Brayton;Alberto L. Sangiovanni-Vincentelli;Curtis T. McMullen;Gary D. Hachtel.
(1984)
Algebric Decision Diagrams and Their Applications
R. I. Bahar;E. A. Frohm;C. M. Gaona;G. D. Hachtel.
formal methods (1997)
VIS: A System for Verification and Synthesis
Robert K. Brayton;Gary D. Hachtel;Alberto L. Sangiovanni-Vincentelli;Fabio Somenzi.
computer aided verification (1996)
Algebraic decision diagrams and their applications
R. Iris Bahar;Erica A. Frohm;Charles M. Gaona;Gary D. Hachtel.
international conference on computer aided design (1993)
Logic Synthesis and Verification Algorithms
Gary D. Hachtel;Fabio Somenzi.
(1996)
Multilevel logic synthesis
R.K. Brayton;G.D. Hachtel;A.L. Sangiovanni-Vincentelli.
Proceedings of the IEEE (1990)
A survey of optimization techniques for integrated-circuit design
R.K. Brayton;G.D. Hachtel;A.L. Sangiovanni-Vincentelli.
Proceedings of the IEEE (1981)
Multi-level logic minimization using implicit don't cares
K.A. Bartlett;R.K. Brayton;G.D. Hachtel;R.M. Jacoby.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1988)
A new algorithm for statistical circuit design based on quasi-Newton methods and function splitting
R. Brayton;G. Hachtel;L. Vidigal.
IEEE Transactions on Circuits and Systems (1979)
Markovian analysis of large finite state machines
G.D. Hachtel;E. Macii;A. Pardo;F. Somenzi.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1996)
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