2017 - IEEE Fellow For contributions to energy-efficient design of digital and mixed-signal circuits
Error floor and Parity-check matrix are the main areas of his Low-density parity-check code studies. He applies his multidisciplinary studies on Parity-check matrix and Low-density parity-check code in his research. His Algorithm research covers fields of interest such as Theoretical computer science and Parallel computing. Borivoje Nikolic undertakes multidisciplinary studies into Theoretical computer science and Algorithm in his work. Other disciplines of study, such as System on a chip and Computer architecture, are mixed together with his Embedded system studies. His study deals with a combination of Computer architecture and Embedded system. Much of his study explores Decoding methods relationship to Bit error rate. His Bit error rate study frequently intersects with other fields, such as Decoding methods. His research combines Telecommunications and Channel (broadcasting).
Electronic engineering and Wideband are commonly linked in his work. Borivoje Nikolic conducts interdisciplinary study in the fields of Wideband and Radio frequency through his research. He integrates Radio frequency and Intermediate frequency in his research. His research ties Jitter and Electrical engineering together. His Jitter study often links to related topics such as Electronic engineering. His study brings together the fields of Amplifier and CMOS. He performs multidisciplinary study in the fields of Amplifier and Intermediate frequency via his papers. Borivoje Nikolic integrates many fields in his works, including Telecommunications and Bandwidth (computing). Borivoje Nikolic performs multidisciplinary study in Bandwidth (computing) and Telecommunications in his work.
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Digital integrated circuits : a design perspective
Jan M Rabaey;Anantha Chandrakasan;Borivoje Nikolic.
Published in <b>2003</b> in Upper Saddle River NJ) by Pearson education (2003)
Digital Integrated Circuits
Jan M. Rabaey;Anantha Chandrakasan;Borivoje Nikolic.
Improved sense-amplifier-based flip-flop: design and measurements
B. Nikolic;V.G. Oklobdzija;V. Stojanovic;Wenyan Jia.
IEEE Journal of Solid-state Circuits (2000)
A 14-b 12-MS/s CMOS pipeline ADC with over 100-dB SFDR
Yun Chiu;Paul R. Gray;Borivoje Nikolic.
international solid-state circuits conference (2004)
VLSI architectures for iterative decoders in magnetic recording channels
Engling Yeo;P. Pakzad;B. Nikolic;V. Anantharam.
asia pacific magnetic recording conference (2001)
Least mean square adaptive digital background calibration of pipelined analog-to-digital converters
Yun Chiu;C.W. Tsang;B. Nikolic;P.R. Gray.
IEEE Transactions on Circuits and Systems I-regular Papers (2004)
Level conversion for dual-supply systems
F. Ishihara;F. Sheikh;B. Nikolic.
IEEE Transactions on Very Large Scale Integration Systems (2004)
Methods for true energy-performance optimization
D. Markovic;V. Stojanovic;B. Nikolic;M.A. Horowitz.
IEEE Journal of Solid-state Circuits (2004)
Clocked CMOS adiabatic logic with integrated single-phase power-clock supply
D. Maksimovic;V.G. Oklobdzija;B. Nikolic;K.W. Current.
IEEE Transactions on Very Large Scale Integration Systems (2000)
An Efficient 10GBASE-T Ethernet LDPC Decoder Design With Low Error Floors
Zhengya Zhang;V. Anantharam;M.J. Wainwright;B. Nikolic.
IEEE Journal of Solid-state Circuits (2010)
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