Poras T. Balsara

Research.com Recognitions

• 2014 - IEEE Fellow For contributions to the design of all-digital frequency synthesis

Overview

Best Publications

• Wireless Power Transfer for Vehicular Applications: Overview and Challenges

  Devendra Patil;Matthew K. McDonough;John M. Miller;Babak Fahimi

  926
  Citations

• All-digital TX frequency synthesizer and discrete-time receiver for bluetooth radio in 130-nm CMOS

  Robert Bogdan Staszewski;Khurram Muhammad;Dirk Leipold;Chih-Ming Hung

  753
  Citations

• 1.3 V 20 ps time-to-digital converter for frequency synthesis in 90-nm CMOS

  R.B. Staszewski;S. Vemulapalli;P. Vallur;J. Wallberg

  468
  Citations

• All-digital frequency synthesizer in deep-submicron CMOS

  Robert Bogdan Staszewski;Poras T. Balsara

  412
  Citations

• Phase-domain all-digital phase-locked loop

  R.B. Staszewski;P.T. Balsara

  271
  Citations

• Digitally controlled oscillator (DCO)-based architecture for RF frequency synthesis in a deep-submicrometer CMOS Process.

  Robert Bogdan Staszewski;Dirk Leipold;Khurram Muhammad;Poras T. Balsara

  267
  Citations

• A first multigigahertz digitally controlled oscillator for wireless applications

  R.B. Staszewski;Chih-Ming Hung;D. Leipold;P.T. Balsara

  228
  Citations

• Event-driven Simulation and modeling of phase noise of an RF oscillator

  R.B. Staszewski;C. Fernando;P.T. Balsara

  170
  Citations

• VLSI Architecture for Matrix Inversion using Modified Gram-Schmidt based QR Decomposition

  C.K. Singh;Sushma Honnavara Prasad;P.T. Balsara

  164
  Citations

• Performance of CMOS differential circuits

  P. Ng;P.T. Balsara;D. Steiss

  154
  Citations

• High-performance energy-efficient D-flip-flop circuits

  Uming Ko;P.T. Balsara

  152
  Citations

• All-Digital PLL With Ultra Fast Settling

  R.B. Staszewski;P.T. Balsara

  149
  Citations

• All-digital phase-domain TX frequency synthesizer for Bluetooth radios in 0.13/spl mu/m CMOS

  R.B. Staszewski;Chih-Ming Hung;K. Maggio;J. Wallberg

  147
  Citations

• A wide-range, high-resolution, compact, CMOS time to digital converter

  V. Ramakrishnan;P.T. Balsara

  117
  Citations

• I/Q mismatch compensation using adaptive decorrelation in a low-IF receiver in 90-nm CMOS process

  I. Elahi;K. Muhammad;P.T. Balsara

  113
  Citations

• High performance low power array multiplier using temporal tiling

  S.S. Mahant-Shetti;P.T. Balsara;C. Lemonds

  100
  Citations

• Input–Output Linearization of a Boost Converter With Mixed Load (Constant Voltage Load and Constant Power Load)

  Sameer Arora;Poras Balsara;Dinesh Bhatia

  98
  Citations

• TDC-based frequency synthesizer for wireless applications

  R.B. Staszewski;D. Leipold;Chih-Ming Hung;P.T. Balsara

  96
  Citations

• Energy optimization of multilevel cache architectures for RISC and CISC processors

  U. Ko;P.T. Balsara;A.K. Nanda

  90
  Citations

• A first digitally-controlled oscillator in a deep-submicron CMOS process for multi-GHz wireless applications

  R.B. Staszewski;D. Leipold;Chih-Ming Hung;P.T. Balsara

  85
  Citations