Paolo Faraboschi

Hewlett Packard Enterprise (United States)
United States

D-Index & Metrics

Discipline name	D-Index	World Ranking	Current World Ranking	National Ranking	Current National Ranking	Publications	Citations
Computer Science	31	13563	13151	5412	5149	146	4762

Computer Science

D-Index

Citations

4762

World Ranking

13563

National Ranking

5412

Research.com Recognitions

2014 - IEEE Fellow For contributions to embedded processor architecture and system-on-chip technology

Best Publications

Embedded Computing: A VLIW Approach to Architecture, Compilers and Tools

Joseph A. Fisher;Paolo Faraboschi;Cliff Young

516
Citations
PUMA: A Programmable Ultra-efficient Memristor-based Accelerator for Machine Learning Inference

Aayush Ankit;Izzat El Hajj;Sai Rahul Chalamalasetti;Geoffrey Ndu

422
Citations
Lx: a technology platform for customizable VLIW embedded processing

Unknown

331
Citations
Lx: a technology platform for customizable VLIW embedded processing

Unknown

284
Citations
COTSon: infrastructure for full system simulation

Unknown

282
Citations
Operating system support for NVM+DRAM hybrid main memory

Jeffrey C. Mogul;Eduardo Argollo;Mehul Shah;Paolo Faraboschi

264
Citations
Hardware solutions for fuzzy control

Unknown

144
Citations
The Who, What, Why, and How of High Performance Computing in the Cloud

Abhishek Gupta;Laxmikant V. Kale;Filippo Gioachin;Verdi March

141
Citations
HPC-Aware VM Placement in Infrastructure Clouds

A. Gupta;L. V. Kale;D. Milojicic;P. Faraboschi

140
Citations
Custom-fit processors: letting applications define architectures

Unknown

127
Citations
DELI: a new run-time control point

Unknown

125
Citations
Evaluating and Improving the Performance and Scheduling of HPC Applications in Cloud

Abhishek Gupta;Paolo Faraboschi;Filippo Gioachin;Laxmikant V. Kale

117
Citations
The latest word in digital and media processing

Unknown

110
Citations
Beyond processor-centric operating systems

Paolo Faraboschi;Kimberly Keeton;Tim Marsland;Dejan Milojicic

96
Citations
Instruction scheduling for instruction level parallel processors

P. Faraboschi;J.A. Fisher;C. Young

94
Citations
TERAFLUX: Harnessing dataflow in next generation teradevices

Roberto Giorgi;Rosa M. Badia;François Bodin;Albert Cohen

93
Citations
How to simulate 1000 cores

Matteo Monchiero;Jung Ho Ahn;Ayose Falcón;Daniel Ortega

86
Citations
Clustered Instruction-Level Parallel Processors

Unknown

80
Citations
Virtual Worlds (Metaverse): From Skepticism, to Fear, to Immersive Opportunities

Unknown

70
Citations
Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture

Yale Patt;Josh Fisher;Paolo Faraboschi;Kevin Skadron

3
Citations