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Computer Science

D-Index
62
Citations
17916
World Ranking
2867
National Ranking
131

Electronics and Electrical Engineering

D-Index
62
Citations
17814
World Ranking
1420
National Ranking
44

Research.com Recognitions

  • 1986 - IEEE Fellow For contributions to the theory of tracking loops and synchronization.

Overview

Heinrich Meyr is affiliated with RWTH Aachen University in Germany. Their work in the academic and research community is recognized notably through the award of IEEE Fellow in 1986, granted for contributions to the theory of tracking loops and synchronization.

Their research and professional focus lie primarily within the areas of signal processing and communications systems, given the nature of the recognized contributions.

There are no specific records of published papers, co-authors, publication venues, or book publications available for this scientist. Similarly, detailed main or subfields of study and main research topics have not been documented in the accessible data.

Best Publications

  • Digital Communication Receivers: Synchronization, Channel Estimation, and Signal Processing

    Heinrich Meyr;Marc Moeneclaey;Stefan Fechtel

  • Optimum receiver design for wireless broad-band systems using OFDM. I

    M. Speth;S.A. Fechtel;G. Fock;H. Meyr

  • Digital filter and square timing recovery

    M. Oerder;H. Meyr

  • Digital communication receivers

    Heinrich Meyr

  • Optimum receiver design for OFDM-based broadband transmission .II. A case study

    M. Speth;S. Fechtel;G. Fock;H. Meyr

  • Synchronization in digital communications

    Heinrich Meyr

  • Frequency synchronization algorithms for OFDM systems suitable for communication over frequency selective fading channels

    F. Classen;H. Meyr

  • Frame synchronization of OFDM systems in frequency selective fading channels

    M. Speth;F. Classen;H. Meyr

  • LISA—machine description language for cycle-accurate models of programmable DSP architectures

    Stefan Pees;Andreas Hoffmann;Vojin Zivojnovic;Heinrich Meyr

  • A universal technique for fast and flexible instruction-set architecture simulation

    Achim Nohl;Gunnar Braun;Oliver Schliebusch;Rainer Leupers

  • Architecture Exploration for Embedded Processors with LISA

    Andreas Hoffmann;Heinrich Meyr;Rainer Leupers

  • High-speed parallel Viterbi decoding: algorithm and VLSI-architecture

    G. Fettweis;H. Meyr

  • A novel methodology for the design of application-specific instruction-set processors (ASIPs) using a machine description language

    A. Hoffmann;T. Kogel;A. Nohl;G. Braun

  • Parallel Viterbi algorithm implementation: breaking the ACS-bottleneck

    G. Fettweis;H. Meyr

  • FRIDGE: a fixed-point design and simulation environment

    H. Keding;M. Willems;M. Coors;H. Meyr

  • LISA-machine description language and generic machine model for HW/SW co-design

    V. Zivojnovic;S. Pees;H. Meyr

  • Achievable rate of MIMO channels with data-aided channel estimation and perfect interleaving

    J. Baltersee;G. Fock;H. Meyr

  • MAPS: an integrated framework for MPSoC application parallelization

    J. Ceng;J. Castrillon;W. Sheng;H. Scharwachter

  • A systematic approach to carrier recovery and detection of digitally phase modulated signals of fading channels

    R. Haeb;H. Meyr

  • High-rate Viterbi processor: a systolic array solution

    G. Fettweis;H. Meyr

  • A universal technique for fast and flexible instruction-set architecture simulation

    G. Braun;A. Nohl;A. Hoffmann;O. Schliebusch

Frequent Co-Authors

Gerd Ascheid
Gerd Ascheid RWTH Aachen University
Rainer Leupers
Rainer Leupers RWTH Aachen University
Marc Moeneclaey
Marc Moeneclaey Ghent University
Cristina Silvano
Cristina Silvano Polytechnic University of Milan
Andreas Burg
Andreas Burg École Polytechnique Fédérale de Lausanne
Petri Mahonen
Petri Mahonen Aalto University
Dimitrios Soudris
Dimitrios Soudris National Technical University of Athens
Gianluca Palermo
Gianluca Palermo Polytechnic University of Milan

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