World's Best Scientists 2026 revealed!

D-Index & Metrics

Computer Science

D-Index
30
Citations
5855
World Ranking
13906
National Ranking
672

Overview

Georg Hager is affiliated with the University of Erlangen-Nuremberg in Germany. Their research spans various areas within computer science, concentrating primarily on parallel computing and related optimization techniques. Across their publications, Hager has explored topics bridging hardware architecture, computer networks, and computational theory.

The main fields of study associated with Hager's work include:

  • Computer Science

Within computer science, their subfields of focus are:

  • Computer Networks and Communications
  • Hardware and Architecture
  • Computational Theory and Mathematics
  • Artificial Intelligence
  • Computational Mechanics

Key topics in Hager's research portfolio encompass:

  • Parallel Computing and Optimization Techniques
  • Advanced Data Storage Technologies
  • Interconnection Networks and Systems
  • Distributed and Parallel Computing Systems
  • Matrix Theory and Algorithms
  • Lattice Boltzmann Simulation Studies
  • Quantum Computing Algorithms and Architecture

Hager has contributed extensively to scientific literature with several recent papers that illustrate a focus on sparse matrix operations and performance engineering in parallel computation environments. Notable publications include:

  • "A Recursive Algebraic Coloring Technique for Hardware-efficient Symmetric Sparse Matrix-vector Multiplication," 2020, ACM Transactions on Parallel Computing
  • "Execution-Cache-Memory modeling and performance tuning of sparse matrix-vector multiplication and Lattice quantum chromodynamics on A64FX," 2021, Concurrency and Computation Practice and Experience
  • "Level-Based Blocking for Sparse Matrices: Sparse Matrix-Power-Vector Multiplication," 2022, IEEE Transactions on Parallel and Distributed Systems
  • "Performance engineering for real and complex tall & skinny matrix multiplication kernels on GPUs," 2020, The International Journal of High Performance Computing Applications
  • "The Role of Idle Waves, Desynchronization, and Bottleneck Evasion in the Performance of Parallel Programs," 2022, IEEE Transactions on Parallel and Distributed Systems

Frequent co-authors in Hager's research include:

  • Gerhard Wellein
  • Ayesha Afzal
  • Jan Laukemann
  • Christie Louis Alappat
  • Jonas Thies

Hager's work is regularly published in a variety of venues such as:

  • arXiv (Cornell University)
  • Zenodo (CERN European Organization for Nuclear Research)
  • The International Journal of High Performance Computing Applications
  • ACM Transactions on Parallel Computing
  • Concurrency and Computation Practice and Experience

Best Publications

  • LIKWID: A Lightweight Performance-Oriented Tool Suite for x86 Multicore Environments

    Jan Treibig;Georg Hager;Gerhard Wellein

  • Introduction to High Performance Computing for Scientists and Engineers

    Georg Hager;Gerhard Wellein

  • Hybrid MPI/OpenMP Parallel Programming on Clusters of Multi-Core SMP Nodes

    Rolf Rabenseifner;Georg Hager;Gabriele Jost

  • LIKWID: Lightweight Performance Tools

    Jan Treibig;Georg Hager;Gerhard Wellein

  • LIKWID: Lightweight Performance Tools

    Jan Treibig;Georg Hager;Gerhard Wellein

  • A Unified Sparse Matrix Data Format for Efficient General Sparse Matrix-Vector Multiplication on Modern Processors with Wide SIMD Units

    Moritz Kreutzer;Georg Hager;Gerhard Wellein;Holger Fehske

  • On the single processor performance of simple lattice Boltzmann kernels

    G. Wellein;T. Zeiser;G. Hager;S. Donath

  • Efficient Temporal Blocking for Stencil Computations by Multicore-Aware Wavefront Parallelization

    Gerhard Wellein;Georg Hager;Thomas Zeiser;Markus Wittmann

  • A unified sparse matrix data format for efficient general sparse matrix-vector multiply on modern processors with wide SIMD units

    Moritz Kreutzer;Georg Hager;Gerhard Wellein;Holger Fehske

  • Quantifying Performance Bottlenecks of Stencil Computations Using the Execution-Cache-Memory Model

    Holger Stengel;Jan Treibig;Georg Hager;Gerhard Wellein

  • Exploring performance and power properties of modern multi-core chips via simple machine models

    Georg Hager;Jan Treibig;Johannes Habich;Gerhard Wellein

  • Comparison of different propagation steps for lattice Boltzmann methods

    Markus Wittmann;Thomas Zeiser;Georg Hager;Gerhard Wellein

  • A Recursive Algebraic Coloring Technique for Hardware-Efficient Symmetric Sparse Matrix-Vector Multiplication

    Christie L. Alappat;Georg Hager;Olaf Schenk;Jonas Thies

  • MULTICORE-OPTIMIZED WAVEFRONT DIAMOND BLOCKING FOR OPTIMIZING STENCIL UPDATES ∗

    Tareq M. Malas;Georg Hager;Hatem Ltaief;Holger Stengel

  • Exploring performance and power properties of modern multicore chips via simple machine models

    Georg Hager;Jan Treibig;Johannes Habich;Gerhard Wellein

  • Performance engineering for the Lattice Boltzmann method on GPGPUs: Architectural requirements and performance results

    Johannes Habich;Christian Feichtinger;Harald Köstler;Georg Hager

  • Expression Templates Revisited: A Performance Analysis of Current Methodologies

    Klaus Iglberger;Georg Hager;Jan Treibig;Ulrich Rüde

  • A flexible Patch-based lattice Boltzmann parallelization approach for heterogeneous GPU-CPU clusters

    Christian Feichtinger;Johannes Habich;Harald KöStler;Georg Hager

  • Communication Characteristics and Hybrid MPI/OpenMP Parallel Pr ogramming on Clusters of Multi-core SMP Nodes

    Georg Hager;Gabriele Jost;Rolf Rabenseifner

  • Introducing a performance model for bandwidth-limited loop kernels

    Jan Treibig;Georg Hager

  • Efficient multicore-aware parallelization strategies for iterative stencil computations

    Jan Treibig;Gerhard Wellein;Georg Hager

  • Multicore-aware parallel temporal blocking of stencil codes for shared and distributed memory

    Markus Wittmann;Georg Hager;Gerhard Wellein

  • Performance analysis and optimization strategies for a D3Q19 lattice Boltzmann kernel on nVIDIA GPUs using CUDA

    J. Habich;T. Zeiser;G. Hager;G. Wellein

  • Introducing a parallel cache oblivious blocking approach for the lattice Boltzmann method

    T. Zeiser;G. Wellein;A. Nitsure;K. Iglberger

  • Comparing the performance of different x86 SIMD instruction sets for a medical imaging application on modern multi- and manycore chips

    Johannes Hofmann;Jan Treibig;Georg Hager;Gerhard Wellein

  • Multicore-optimized wavefront diamond blocking for optimizing stencil updates

    Tareq Malas;Georg Hager;Hatem Ltaief;Holger Stengel

Frequent Co-Authors

Gerhard Wellein
Gerhard Wellein University of Erlangen-Nuremberg
Ulrich Rüde
Ulrich Rüde University of Erlangen-Nuremberg
David E. Keyes
David E. Keyes King Abdullah University of Science and Technology
Olaf Schenk
Olaf Schenk Universita della Svizzera Italiana
Matthias Scheffler
Matthias Scheffler Fritz Haber Institute of the Max Planck Society
Joachim Hornegger
Joachim Hornegger University of Erlangen-Nuremberg
Christian Lengauer
Christian Lengauer University of Passau

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