Sang Lyul Min mainly focuses on Parallel computing, Block, Cache, Computer hardware and Cache algorithms. His Cache research incorporates themes from Reduced instruction set computing and Worst-case execution time. Sang Lyul Min interconnects Controller and Process in the investigation of issues within Computer hardware.
His Cache algorithms study combines topics from a wide range of disciplines, such as Disk buffer and File system. His research investigates the connection between Flash memory and topics such as Non-volatile memory that intersect with issues in CompactFlash, Embedded system, Host, Memory architecture and Flash memory emulator. His CPU cache research focuses on Real-time operating system and how it relates to Processor scheduling, Preemption and Linear programming.
Sang Lyul Min mainly investigates Embedded system, Parallel computing, Computer hardware, Flash memory and Cache. His studies in Embedded system integrate themes in fields like File system, Dynamic voltage scaling, Memory management, Paging and Auxiliary memory. His Parallel computing research is multidisciplinary, relying on both Real-time operating system, Compiler, Static timing analysis and Worst-case execution time.
His work on Computer data storage, Non-volatile memory and Semiconductor memory as part of general Computer hardware study is frequently linked to Buffer, therefore connecting diverse disciplines of science. Sang Lyul Min combines subjects such as Block and Flash memory emulator, Flash file system, Computer memory with his study of Flash memory. His studies in CPU cache integrate themes in fields like Scheduling and Preemption.
His primary areas of study are Embedded system, Flash memory, Flash file system, Computer hardware and Flash memory emulator. His Embedded system research integrates issues from Memory management, Demand paging and Paging, Multi-core processor, Operating system. His research integrates issues of Page table, Block, Scheduling and Logical address in his study of Flash memory.
The study incorporates disciplines such as Zero page and NVDIMM in addition to Block. Sang Lyul Min interconnects Controller, User device and Parallel computing in the investigation of issues within Computer hardware. His research related to Scratchpad memory and Cache might be considered part of Parallel computing.
His primary scientific interests are in Computer hardware, Computer data storage, Flash file system, Embedded system and Flash memory controller. His Computer hardware study focuses mostly on Flash memory and Flash memory emulator. His Flash memory research is multidisciplinary, incorporating perspectives in Memory architecture, Random access memory, Non-volatile memory, Computer memory and Non-volatile random-access memory.
His Computer data storage research entails a greater understanding of Operating system. His studies deal with areas such as Dram, Performance prediction, Real-time computing and Multi-core processor as well as Embedded system. He combines subjects such as Response time, Quality of service, Factor, Universal memory and Mobile device with his study of Flash memory controller.
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A space-efficient flash translation layer for CompactFlash systems
Jesung Kim;Jong Min Kim;S.H. Noh;Sang Lyul Min.
IEEE Transactions on Consumer Electronics (2002)
LRFU: a spectrum of policies that subsumes the least recently used and least frequently used policies
Donghee Lee;Jongmoo Choi;Jong-Hun Kim;S.H. Noh.
IEEE Transactions on Computers (2001)
An accurate worst case timing analysis for RISC processors
Sung-Soo Lim;Young Hyun Bae;Gyu Tae Jang;Byung-Do Rhee.
IEEE Transactions on Software Engineering (1995)
Analysis of cache-related preemption delay in fixed-priority preemptive scheduling
Chang-Gun Lee;Hoosun Hahn;Yang-Min Seo;Sang Lyul Min.
IEEE Transactions on Computers (1998)
Enhanced analysis of cache-related preemption delay in fixed-priority preemptive scheduling
Chang-Gun Lee;Joosun Hahn;Yang-Min Seo;Sang Lyul Min.
real-time systems symposium (1996)
On the existence of a spectrum of policies that subsumes the least recently used (LRU) and least frequently used (LFU) policies
Donghee Lee;Jongmoo Choi;Jong-Hun Kim;Sam H. Noh.
measurement and modeling of computer systems (1999)
Stochastic analysis of periodic real-time systems
J.L. Diaz;D.F. Garcia;Kanghee Kim;Chang-Gun Lee.
real time systems symposium (2002)
A low-overhead high-performance unified buffer management scheme that exploits sequential and looping references
Jong Min Kim;Jongmoo Choi;Jesung Kim;Sam H. Noh.
operating systems design and implementation (2000)
Performance comparison of dynamic voltage scaling algorithms for hard real-time systems
Woonseok Kim;Dongkun Shin;Han-Saem Yun;Jihong Kim.
real time technology and applications symposium (2002)
A Dynamic Voltage Scaling Algorithm for Dynamic-Priority Hard Real-Time Systems Using Slack Time Analysis
Woonseok Kim;Jihong Kim;Sang Lyul Min.
design, automation, and test in europe (2002)
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