Michael P. Flynn

Best Publications

• A fully integrated reprogrammable memristor–CMOS system for efficient multiply–accumulate operations

  Fuxi Cai;Justin M. Correll;Seung Hwan Lee;Yong Lim;Yong Lim

  684
  Citations

• A SAR-Assisted Two-Stage Pipeline ADC

  C C Lee;M P Flynn

  314
  Citations

• A SAR-Assisted Two-Stage Pipeline ADC

  Chun C. Lee;Michael P. Flynn

  314
  Citations

• A 90-MS/s 11-MHz-Bandwidth 62-dB SNDR Noise-Shaping SAR ADC

  Jeffrey Fredenburg;Michael Flynn

  302
  Citations

• A 1 mW 71.5 dB SNDR 50 MS/s 13 bit Fully Differential Ring Amplifier Based SAR-Assisted Pipeline ADC

  Yong Lim;Michael P. Flynn

  228
  Citations

• A Fully Integrated Auto-Calibrated Super-Regenerative Receiver in 0.13- $\mu{\hbox {m}}$ CMOS

  Jia-Yi Chen;M.P. Flynn;J.P. Hayes

  197
  Citations

• A 64 Channel Programmable Closed-Loop Neurostimulator With 8 Channel Neural Amplifier and Logarithmic ADC

  Jongwoo Lee;Hyo-Gyuem Rhew;Daryl R Kipke;Michael P Flynn

  188
  Citations

• A 100 MS/s, 10.5 Bit, 2.46 mW Comparator-Less Pipeline ADC Using Self-Biased Ring Amplifiers

  Yong Lim;Michael P. Flynn

  179
  Citations

• A new transponder architecture with on-chip ADC for long-range telemetry applications

  F. Kocer;M.P. Flynn

  173
  Citations

• A 4-GS/s 4-bit Flash ADC in 0.18- $\mu{\hbox {m}}$ CMOS

  Sunghyun Park;Y. Palaskas;M.P. Flynn

  147
  Citations

• CMOS DLL based 2 V, 3.2 ps jitter, 1 GHz clock synthesizer and temperature compensated tunable oscillator

  Unknown

  142
  Citations

• CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and temperature-compensated tunable oscillator

  Unknown

  132
  Citations

• A Fully Self-Contained Logarithmic Closed-Loop Deep Brain Stimulation SoC With Wireless Telemetry and Wireless Power Management

  Hyo Gyuem Rhew;Jaehun Jeong;Jeffrey A. Fredenburg;Sunjay Dodani

  123
  Citations

• A 9-bit, 14 μW and 0.06 mm $^{2}$ Pulse Position Modulation ADC in 90 nm Digital CMOS

  S Naraghi;M Courcy;M P Flynn

  118
  Citations

• Digital calibration incorporating redundancy of flash ADCs

  M.P. Flynn;C. Donovan;L. Sattler

  117
  Citations

• A 400 M sample/s 6b CMOS folding and interpolating ADC

  Unknown

  113
  Citations

• CMOS folding A/D converters with current-mode interpolation

  M.P. Flynn;D.J. Allstot

  111
  Citations

• A "digital" 6-bit ADC in 0.25-μm CMOS

  Conor Donovan;Michael P. Flynn

  98
  Citations

• A Bidirectional Neural Interface Circuit With Active Stimulation Artifact Cancellation and Cross-Channel Common-Mode Noise Suppression

  Adam E. Mendrela;Jihyun Cho;Jeffrey A. Fredenburg;Vivek Nagaraj

  92
  Citations

• A 3.5 GS/s 5-b Flash ADC in 90 nm CMOS

  Sunghyun Park;Yorgos Palaskas;Ashoke Ravi;Ralph Bishop

  87
  Citations