His primary areas of study are Computer network, Distributed computing, Real-time computing, Computer hardware and Latency. The Computer network study combines topics in areas such as Scalability and World Wide Web. In general Distributed computing study, his work on High availability often relates to the realm of Linearizability, thereby connecting several areas of interest.
His Real-time computing research integrates issues from Wireless, Encoder, Arithmetic underflow and Component. His Extended memory study, which is part of a larger body of work in Computer hardware, is frequently linked to Non-standard RAID levels, Throughput and Parity drive, bridging the gap between disciplines. His Latency research is multidisciplinary, incorporating perspectives in Consistency model, Server and Hybrid storage.
His main research concerns Parallel computing, Embedded system, Distributed computing, Field-programmable gate array and Computer architecture. The various areas that Mahesh Balakrishnan examines in his Parallel computing study include Scheduling, Process, Computer hardware and Interconnection. His studies in Embedded system integrate themes in fields like Cache pollution and Cache.
His studies deal with areas such as Scalability, Computer network, Server and Data structure as well as Distributed computing. His Computer network research incorporates themes from Forward error correction and Cloud computing. His Computer architecture study incorporates themes from High-level synthesis, Design space exploration and Application software.
The scientist’s investigation covers issues in Parallel computing, Field-programmable gate array, Embedded system, Braille and Multi-core processor. The study incorporates disciplines such as Concurrent data structure, Data structure, Construct and Server in addition to Parallel computing. As a part of the same scientific family, Mahesh Balakrishnan mostly works in the field of Server, focusing on Computer data storage and, on occasion, Dram, Terabyte and Latency.
His Field-programmable gate array research incorporates elements of Software implementation and Speedup. His study on Embedded system also encompasses disciplines like
The scientist’s investigation covers issues in Braille, Parallel computing, Refreshable braille display, Data structure and Field-programmable gate array. Mahesh Balakrishnan integrates Parallel computing and Abstraction in his studies. His work deals with themes such as Computer hardware, SMA* and Shape-memory alloy, which intersect with Refreshable braille display.
His Data structure research is multidisciplinary, incorporating elements of Server, Leverage and Concurrency. Mahesh Balakrishnan combines subjects such as Replication, Distributed computing, Node and Computer data storage with his study of Server. He has researched Field-programmable gate array in several fields, including Embedding and Software implementation.
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Scratchpad memory: a design alternative for cache on-chip memory in embedded systems
Rajeshwari Banakar;Stefan Steinke;Bo-Sik Lee;M. Balakrishnan.
international symposium on open collaboration (2002)
Extending SSD lifetimes with disk-based write caches
Gokul Soundararajan;Vijayan Prabhakaran;Mahesh Balakrishnan;Ted Wobber.
file and storage technologies (2010)
Consistency-based service level agreements for cloud storage
Douglas B. Terry;Vijayan Prabhakaran;Ramakrishna Kotla;Mahesh Balakrishnan.
symposium on operating systems principles (2013)
Differential RAID: rethinking RAID for SSD reliability
Mahesh Balakrishnan;Asim Kadav;Vijayan Prabhakaran;Dahlia Malkhi.
european conference on computer systems (2010)
Communicating using a cloud infrastructure
Patrick Stuedi;Mahesh Balakrishnan;Iqbal Mohomed;Venugopalan Ramasubramanian.
(2010)
ASIP design methodologies: survey and issues
M.K. Jain;M. Balakrishnan;A. Kumar.
international conference on vlsi design (2001)
Seamless splicing of MPEG-2 multimedia data streams
Hayder Radha;Mahesh Balakrishnan;Kavitha Parthasarathy.
(1998)
An encoder buffer having an effective size which varies automatically with the channel bit-rate
Balakrishnan Mahesh.
(1995)
CORFU: a shared log design for flash clusters
Mahesh Balakrishnan;Dahlia Malkhi;Vijayan Prabhakaran;Ted Wobber.
networked systems design and implementation (2012)
Reducing energy consumption by dynamic copying of instructions onto onchip memory
Stefan Steinke;Nils Grunwald;Lars Wehmeyer;Rajeshwari Banakar.
international symposium on systems synthesis (2002)
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