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Computer Science

D-Index
39
Citations
9129
World Ranking
9578
National Ranking
4057

Overview

Hong Wang is a researcher affiliated with Intel in the United States whose work primarily spans the field of engineering. Their publications focus predominantly on electrical and electronic engineering, with additional contributions to biomedical engineering, materials chemistry, and neuroscience-related subfields.

The scope of Hong Wang's research includes topics such as advanced memory and neural computing, advanced sensor and energy harvesting materials, ferroelectric and negative capacitance devices, photoreceptor and optogenetics research, neuroscience and neural engineering, neural networks and reservoir computing, as well as neural dynamics and brain function.

Frequent co-authors collaborating with Hong Wang include:

  • Xiaohua Ma
  • Rui Wang
  • Bowen Zhu
  • Dingwei Li
  • Yaxiong Cao

Hong Wang has published extensively in various scientific journals. Notable publication venues include:

  • IEEE Electron Device Letters
  • Applied Physics Letters
  • IEEE Transactions on Electron Devices
  • SSRN Electronic Journal
  • Advanced Electronic Materials

Representative recent papers by Hong Wang include:

  • Asymmetric Trilayer All-Polymer Dielectric Composites with Simultaneous High Efficiency and High Energy Density: A Novel Design Targeting Advanced Energy Storage Capacitors (2021), Advanced Functional Materials
  • Fully Printed Optoelectronic Synaptic Transistors Based on Quantum Dot-Metal Oxide Semiconductor Heterojunctions (2022), ACS Nano
  • A Skin-Inspired Artificial Mechanoreceptor for Tactile Enhancement and Integration (2021), ACS Nano
  • Spike Encoding with Optic Sensory Neurons Enable a Pulse Coupled Neural Network for Ultraviolet Image Segmentation (2020), Nano Letters
  • A Pure 2H-MoS2 Nanosheet-Based Memristor with Low Power Consumption and Linear Multilevel Storage for Artificial Synapse Emulator (2020), Advanced Electronic Materials

Best Publications

  • Loihi: A Neuromorphic Manycore Processor with On-Chip Learning

    Mike Davies;Narayan Srinivasa;Tsung-Han Lin;Gautham Chinya

  • Speculative precomputation: long-range prefetching of delinquent loads

    Jamison D. Collins;Hong Wang;Dean M. Tullsen;Christopher Hughes

  • Merge: a programming model for heterogeneous multi-core systems

    Michael D. Linderman;Jamison D. Collins;Hong Wang;Teresa H. Meng

  • Dynamic speculative precomputation

    Jamison D. Collins;Dean M. Tullsen;Hong Wang;John P. Shen

  • System To Profile And Optimize User Software In A Managed Run-Time Environment

    Chris J. Newburn;Robert P. Knight;Robert Y. Geva;Dion Rodgers

  • Profiling using a user-level control mechanism

    Chris Newburn;Hong Wang;Xiang Zou;Robert Knight

  • EXOCHI: architecture and programming environment for a heterogeneous multi-core multithreaded system

    Perry H. Wang;Jamison D. Collins;Gautham N. Chinya;Hong Jiang

  • Best of both latency and throughput

    E. Grochowski;R. Ronen;J. Shen;Hong Wang

  • Post-pass binary adaptation for software-based speculative precomputation

    Steve S.W. Liao;Perry H. Wang;Hong Wang;Gerolf Hoflehner

  • Physical experimentation with prefetching helper threads on Intel's hyper-threaded processors

    D. Kim;S.S.-W. Liao;P.H. Wang;J. del Cuvillo

  • Programming Spiking Neural Networks on Intel’s Loihi

    Chit-Kwan Lin;Andreas Wild;Gautham N. Chinya;Yongqiang Cao

  • Programmable event driven yield mechanism which may activate other threads

    Hong Wang;Per Hammarlund;Xiang Zou;John P. Shen

  • Caching DAG traces

    Hong Wang;Neil Chazin;Christopher Hughes;Ralph Kling

  • CPR: Composable performance regression for scalable multiprocessor models

    Benjamin C. Lee;Jamison Collins;Hong Wang;David Brooks

  • Method and apparatus for affinity-guided speculative helper threads in chip multiprocessors

    Hong Wang;Perry H. Wang;Jeffery A. Brown;Per Hammarlund

  • Intel nehalem processor core made FPGA synthesizable

    Graham Schelle;Jamison Collins;Ethan Schuchman;Perrry Wang

  • Mechanism for instruction set based thread execution on a plurality of instruction sequencers

    Hong Wang;John Shen;Ed Grochowski;James Paul Held

  • Compiler and Runtime for Heterogeneous Multiprocessor Systems

    Michael D. Linderman;Jamison D. Collins;Perry Wang;Hong Wang

  • Method and apparatus for compiler-generated triggering of auxiliary codes

    Daniel Lavery;Hong Wang;Gerolf Hoflehner;Shih-Wei Liao

  • Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor

    Henry Wong;Anne Bracy;Ethan Schuchman;Tor M. Aamodt

Frequent Co-Authors

John Paul Shen
John Paul Shen Carnegie Mellon University
Tanay Karnik
Tanay Karnik Intel (United States)
Ian A. Young
Ian A. Young Intel (United States)
Murali Annavaram
Murali Annavaram University of Southern California
Antonio Gonzalez
Antonio Gonzalez Universitat Politècnica de Catalunya
Dean M. Tullsen
Dean M. Tullsen University of California, San Diego
Sasikanth Manipatruni
Sasikanth Manipatruni Intel (United States)
Konrad K. Lai
Konrad K. Lai Intel (United States)
Vivek De
Vivek De Intel (United States)

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