Ali-Reza Adl-Tabatabai focuses on Transactional memory, Software transactional memory, Operating system, Parallel computing and Database transaction. His study with Transactional memory involves better knowledge in Programming language. His Software transactional memory research integrates issues from Concurrent computing, Transaction processing, Concurrency control and Concurrency.
His research investigates the connection between Operating system and topics such as Computer architecture that intersect with problems in Debugging, Instrumentation and Instruction set. His study looks at the intersection of Parallel computing and topics like Thread with Speculative execution, Isolation and Input/output. Ali-Reza Adl-Tabatabai has included themes like Computer hardware and State in his Database transaction study.
His primary areas of investigation include Transactional memory, Software transactional memory, Parallel computing, Operating system and Database transaction. His Transactional memory study contributes to a more complete understanding of Programming language. His studies deal with areas such as Concurrent computing, Commitment ordering, Memory map and Memory management as well as Software transactional memory.
His research combines Thread and Parallel computing. His work carried out in the field of Database transaction brings together such families of science as Commit and State. As a member of one scientific family, Ali-Reza Adl-Tabatabai mostly works in the field of CPU cache, focusing on Computer hardware and, on occasion, Synchronization.
Transactional memory, Parallel computing, Operating system, Software transactional memory and Atomicity are his primary areas of study. To a larger extent, he studies Database transaction with the aim of understanding Transactional memory. The concepts of his Parallel computing study are interwoven with issues in Software, Thread and Central processing unit.
His work on Virtual memory and Page replacement algorithm as part of general Operating system study is frequently connected to Translation lookaside buffer and Page table, therefore bridging the gap between diverse disciplines of science and establishing a new relationship between them. His Software transactional memory research is multidisciplinary, incorporating elements of Non-lock concurrency control, Optimistic concurrency control, Commitment ordering, Multiversion concurrency control and Concurrency control. His study in Atomicity is interdisciplinary in nature, drawing from both Event, Lock, Debugging and POSIX Threads.
The scientist’s investigation covers issues in Operating system, Transactional memory, Parallel computing, Software transactional memory and Database transaction. The various areas that he examines in his Transactional memory study include Value, Mode and Transaction processing system. The Parallel computing study combines topics in areas such as Uniform memory access, Thread and Atomicity.
His Thread research incorporates elements of Distributed shared memory, Registered memory, Bus sniffing and Interleaved memory, Cache-only memory architecture. His Software transactional memory study incorporates themes from Debugging, Compiler, POSIX Threads and Code. His work in Database transaction addresses subjects such as CPU cache, which are connected to disciplines such as Win32 Thread Information Block, Distributed transaction and Software.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Bratin Saha;Ali-Reza Adl-Tabatabai;Richard L. Hudson;Chi Cao Minh.
acm sigplan symposium on principles and practice of parallel programming (2006)
Compiler and runtime support for efficient software transactional memory
Ali-Reza Adl-Tabatabai;Brian T. Lewis;Vijay Menon;Brian R. Murphy.
programming language design and implementation (2006)
Fast, effective code generation in a just-in-time Java compiler
Ali-Reza Adl-Tabatabai;Michał Cierniak;Guei-Yuan Lueh;Vishesh M. Parikh.
programming language design and implementation (1998)
Open nesting in software transactional memory
Yang Ni;Vijay S. Menon;Ali-Reza Adl-Tabatabai;Antony L. Hosking.
acm sigplan symposium on principles and practice of parallel programming (2007)
Architectural Support for Software Transactional Memory
Bratin Saha;Ali-Reza Adl-Tabatabai;Quinn Jacobson.
international symposium on microarchitecture (2006)
Enforcing isolation and ordering in STM
Tatiana Shpeisman;Vijay Menon;Ali-Reza Adl-Tabatabai;Steven Balensiefer.
programming language design and implementation (2007)
Design and implementation of transactional constructs for C/C++
Yang Ni;Adam Welc;Ali-Reza Adl-Tabatabai;Moshe Bach.
conference on object-oriented programming systems, languages, and applications (2008)
Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language
Cheng Wang;Wei-Yu Chen;Youfeng Wu;Bratin Saha.
symposium on code generation and optimization (2007)
Method of run-time tracking of object references in Java programs
Ali-Reza Adl-Tabatabai;Guei-Yuan Lueh.
Mechanisms to accelerate transactions using buffered stores
Ali-Reza Adl-Tabatabai;Yang Ni;Bratin Saha;Vadim Bassin.
If you think any of the details on this page are incorrect, let us know.
We appreciate your kind effort to assist us to improve this page, it would be helpful providing us with as much detail as possible in the text box below: