Bratin Saha mostly deals with Transactional memory, Software transactional memory, Operating system, Concurrency and Programming language. His research in Transactional memory intersects with topics in Record locking, Memory management and Parallel computing. The study incorporates disciplines such as Transaction processing, Concurrency control, Data structure and Shared memory in addition to Software transactional memory.
Bratin Saha studied Concurrency control and Lock that intersect with Nested transaction. His Concurrency research is multidisciplinary, relying on both Scalability and Concurrent computing. The concepts of his Database transaction study are interwoven with issues in Thread and Commit.
Bratin Saha spends much of his time researching Transactional memory, Operating system, Software transactional memory, Parallel computing and Database transaction. Transactional memory is the subject of his research, which falls under Programming language. The Operating system study which covers Record locking that intersects with Speculative execution, Event and Semantics.
His work is dedicated to discovering how Software transactional memory, Concurrency control are connected with Optimizing compiler and Lock and other disciplines. His Parallel computing research includes themes of Thread, Central processing unit, Instruction register and Virtual function. His studies deal with areas such as Timestamp, CPU cache and Commit as well as Database transaction.
His main research concerns Operating system, Transactional memory, Parallel computing, Shared memory and Database transaction. Bratin Saha is studying Software transactional memory, which is a component of Transactional memory. His Software transactional memory research is multidisciplinary, incorporating elements of Serializability, Multiprocessing, Scalability and Concurrent computing.
Bratin Saha interconnects Lock, Thread, Win32 Thread Information Block, Atomicity and Event in the investigation of issues within Parallel computing. In his study, which falls under the umbrella issue of Shared memory, Modular design, Time to market, Modular architecture and Code reuse is strongly linked to Embedded system. His Database transaction study combines topics from a wide range of disciplines, such as Value, Timestamp, Computer network and Set.
His primary areas of investigation include Operating system, Parallel computing, Event, Atomicity and Lock. His work on Write buffer as part of general Operating system study is frequently linked to Single application, therefore connecting diverse disciplines of science. His Write buffer research is multidisciplinary, incorporating perspectives in Transactional memory, Database transaction and Win32 Thread Information Block.
Among his research on Single application, you can see a combination of other fields of science like Central processing unit, Virtual address space, Software, Programming paradigm and Stack. His work deals with themes such as Shared virtual memory and Distributed shared memory, which intersect with Central processing unit. Bratin Saha undertakes multidisciplinary investigations into Buffer and Thread in his work.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Bratin Saha;Ali-Reza Adl-Tabatabai;Richard L. Hudson;Chi Cao Minh.
acm sigplan symposium on principles and practice of parallel programming (2006)
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Bratin Saha;Ali-Reza Adl-Tabatabai;Richard L. Hudson;Chi Cao Minh.
acm sigplan symposium on principles and practice of parallel programming (2006)
Compiler and runtime support for efficient software transactional memory
Ali-Reza Adl-Tabatabai;Brian T. Lewis;Vijay Menon;Brian R. Murphy.
programming language design and implementation (2006)
Compiler and runtime support for efficient software transactional memory
Ali-Reza Adl-Tabatabai;Brian T. Lewis;Vijay Menon;Brian R. Murphy.
programming language design and implementation (2006)
Open nesting in software transactional memory
Yang Ni;Vijay S. Menon;Ali-Reza Adl-Tabatabai;Antony L. Hosking.
acm sigplan symposium on principles and practice of parallel programming (2007)
Architectural Support for Software Transactional Memory
Bratin Saha;Ali-Reza Adl-Tabatabai;Quinn Jacobson.
international symposium on microarchitecture (2006)
Open nesting in software transactional memory
Yang Ni;Vijay S. Menon;Ali-Reza Adl-Tabatabai;Antony L. Hosking.
acm sigplan symposium on principles and practice of parallel programming (2007)
Architectural Support for Software Transactional Memory
Bratin Saha;Ali-Reza Adl-Tabatabai;Quinn Jacobson.
international symposium on microarchitecture (2006)
Enforcing isolation and ordering in STM
Tatiana Shpeisman;Vijay Menon;Ali-Reza Adl-Tabatabai;Steven Balensiefer.
programming language design and implementation (2007)
Enforcing isolation and ordering in STM
Tatiana Shpeisman;Vijay Menon;Ali-Reza Adl-Tabatabai;Steven Balensiefer.
programming language design and implementation (2007)
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