Design Automation Conference (DAC)

Artificial Intelligence (AI)
AI1. AI/ML Algorithms

AI1.1 Hardware-aware ML model development
AI1.2 Efficient ML training, inference, and serving
AI1.3 Approximation techniques for neural network training and inference
AI1.4 Testing, debugging, and monitoring of ML applications
AI1.5 Interpretability and explainability for ML models

AI2. AI/ML Application and Infrastructure

AI2.1 Application-driven Al/ML learning/models/inferences
AI2.2 Application-driven approximations in design for AI/ML
AI2.3 Infrastructures for AI (datasets, implementations)\
AI2.4 Interpretability and explainability for ML applications

AI3. AI/ML Security/Privacy

AI3.1 Privacy and security for AI/ML applications
AI3.2 AI/ML-based attacks and defenses
AI3.3 Adversarial machine learning attacks and defenses
AI3.4 AI/ML for cyber defense
AI3.5 Fairness for AI/ML applications
Autonomous Systems

AS1. Autonomous Systems (Automotive, Robotics, Drones)

AS1.1 Autonomous Systems Design Tools and Methodologies
AS1.2 Autonomous Systems Architectures
AS1.3 Autonomous Systems Safety and Reliability
AS1.4 Silicon health monitoring and predictive maintenance

Design

DES1. Design of Cyber-physical Systems and IoT

DES1.1 Cyber-physical systems and Internet-of-Things (IoT) platforms
DES1.2 Low-power and energy-efficient design techniques for IoT
DES1.3 Partitioned Edge/hub/cloud processing
DES1.4 Dependable and safety-critical embedded system design
DES1.5 Networking and storage system design
DES1.6 Advanced wireless communication system design

DES2. SoC, Heterogeneous, and Reconfigurable Architectures

DES2.1 Architectures for stochastic, statistical and approximate computing
DES2.2 SoC and heterogeneous multi- and many-core architectures
DES2.3 Run-time and design-time reconfigurable processor architectures
DES2.4 2.5D/3D heterogeneous integration of compute, memory and communication platforms

DES3A. In-memory and Near-memory Computing Circuits

DES3.1 Circuit techniques for near- or in-memory processing
DES3.2 Memory and storage technologies for near- or in-memory processing,
DES3.3 Emerging technologies for in-memory and near-memory computing
DES3.4 Circuit-Inspired architectures for in/near-memory computing


DES3B. In-memory and Near-memory Computing Architectures, Applications and Systems

DES3.1 Near- or in-memory data management and processing models
DES3.2 Architectures for near- or in-memory processing
DES3.3 Memory and storage architectures for near- or in-memory processing
DES3.4 Data reorganization engines for specific applications
DES3.5 System/architecture interaction, execution model, interfaces
DES3.6 Specialized architectures for key workloads taking advantage of near- and -in-memory processing

DES4. AI/ML Architecture Design

DES4.1 AI/ML accelerator, processing engine design and architecture
DES4.2 Application-specific AI/ML architectures
DES4.3 Approximation techniques for hardware architecture

DES5. AI/ML System and Platform Design

DES5.1 Hardware/software codesign and co-optimization
DES5.2 Specialized AI/ML system design
DES5.3 Architecture-algorithm co-design for approximate computing
DES5.4 AI/ML system modeling and simulation methodologies
DES5.5 Evaluation and measurement of AI/ML systems

DES6. Emerging Models of Computation

DES6.1 Biologically-based or biologically-inspired computing systems
DES6.2 Design automation for system & synthetic biology
DES6.3 Neuromorphic and brain-inspired computing
DES6.4 Neuromorphic and brain-inspired processors
DES6.5 Neuromorphic and brain-inspired circuits

DES7. AL/ML, Digital, and Analog Circuits

DES7.1 AI/ML circuits
DES7.2 Digital circuits and systems
DES7.3 Analog circuits and data converters
DES7.4 RF, wireless & wireline circuits and systems
DES7.5 Imagers, MEMS, medical, and display circuits
DES7.6 Memory design
DES7.7 Power management circuits
DES7.8 2.5-D and 3-D integrated circuit designs

DES8. Emerging Device Technologies

DES8.1 New transistor structures
DES8.2 Beyond-CMOS devices (e.g., steep-slope devices, spintronics)
DES8.3 New process technologies
DES8.4 Nanotechnologies, nanowires, nanotubes
DES8.5 Emerging non-volatile memory devices

DES9. Quantum Computing

DES9.1 Quantum computing applications and algorithms
DES9.2 Quantum computing hardware architecture and design
DES9.3 Quantum computing technology
DES9.4 EDA for quantum computing systems

Electronic Design Automation (EDA)

EDA1. Design Methodologies for System-on-Chip and 3D/2.5D System-in Package

EDA1.1 3D/2.5D SoC/package and communication technologies
EDA1.2 System-on-Chip (SoC) specification, modeling, analysis, simulation, and verification
EDA1.3 Application-specific processor design tools
EDA1.4 Design tools for accelerator-rich architectures and heterogeneous multi-cores
EDA1.5 Tools for reconfigurable computing
EDA1.6 HW/SW co-design, interface synthesis, and co-verification
EDA1.7 System-level methods for reliability and aging
EDA1.8 In-Package and On-Chip Communication architecture modeling and analysis
EDA1.9 Synthesis and optimization of communication architectures
EDA1.10 NoC architectures and design methodologies
EDA1.11 Communication architectures using alternative technologies (e.g., nanophotonics, RF)

EDA2. Design Verification and Validation

EDA2.1 Functional and transaction-level modeling and validation, coverage and test generation for hardware and embedded systems
EDA2.2 Emulation and hardware acceleration
EDA2.3 Formal and semi-formal verification and verification technologies
EDA2.4 Verification of firmware, software, and hybrid hardware/software systems
EDA2.5 Machine learning techniques for verification
EDA2.6 Post-silicon design validation and debug
EDA2.7 Validation of cognitive systems
EDA2.8 Verification on the cloud

EDA3. Timing and Power Analysis and Optimization

EDA3.1 System-level low-power design analysis and management
EDA3.2 Architectural power reduction techniques and analysis tools
EDA3.3 Low-power circuit design methods and tools
EDA3.4 Thermal analysis and management
EDA3.5 Timing analysis and simulation/delay modeling
EDA3.6 Power/signal integrity and noise analysis
EDA3.7 Process technology modeling
EDA3.8 Timing, power, and thermal analysis and optimization for 3D/2.5D

EDA4 . RTL/Logic Level and High-level Synthesis

EDA4.1 Combinational, sequential and asynchronous logic synthesis
EDA4.2 Technology mapping, cell-based design and optimization
EDA4.3 High-level, behavioral, algorithmic, and architectural synthesis, “C” to gates tools and methods
EDA4.4 Synthesis for FPGAs
EDA4.5 Synthesis for circuits in emerging device technologies
EDA4.6 Synthesis on the cloud

EDA5. Analog CAD, Simulation, Verification and Test

EDA5.1 Analog, mixed-signal, and RF design methodologies
EDA5.2 Automated synthesis, place and route, and optimization of analog designs
EDA5.3 Analog, mixed-signal, RF, electromagnetic, substrate noise modeling and simulation
EDA5.4 Model order reduction techniques for analog/RF designs

EDA6. Physical Design and Verification

EDA6.1 Floorplanning, partitioning, placement, and routing
EDA6.2 Interconnect and clock network planning and synthesis
EDA6.3 Cross-layer placement and routing optimization for timing/power/yield
EDA6.4 Physical design of 3D/2.5D IC and package (e.g., TSV, interposer, monolithic)
EDA6.5 Layout optimization for optical interconnects
EDA6.6 Layout verification
EDA6.7 Physical design on the cloud

EDA7. Design for Manufacturability and Reliability

EDA7.1 Design-technology co-optimization (DTCO)
EDA7.2 Standard and custom cell design and optimization
EDA7.3 Process technology characterization, extraction, and modeling
EDA7.4 Reticle enhancement, lithography-related design optimizations and design rule checking
EDA7.5 Design for manufacturability, yield, defect tolerance, cost issues, and DFM impact
EDA7.6 Device-, gate, and circuit-level techniques for reliability analysis and optimization (e.g., soft error, aging, etc.)
EDA7.7 3D/2.5D manufacturability and reliability, including mechanical stress
EDA7.8 Post-Layout optimizations

EDA8. Design for Test and Silicon Lifecycle Management

EDA8.1 Fault modeling, ATPG, DFT, BIST, compression
EDA8.2 Memory, FPGA, and emerging technology test and reliability
EDA8.3 SoC, board- and system-level test
EDA8.4 Post-silicon test, optimization, and defect diagnosis
EDA8.5 Test for analog/mixed-signal/RF circuits
EDA8.6 Silicon lifecycle management

Embedded Systems & Software (ESS)

ESS1. Embedded Software

ESS1.1 Embedded software verification methodologies
ESS1.2 Embedded operating systems, middleware, runtime support, resource management, and virtual machines
ESS1.3 Software techniques for multicores, GPUs, and multithreaded embedded architectures
ESS1.4 Compilation strategies, code transformation and parallelization techniques for embedded systems
ESS1.5 Domain-specific embedded libraries (e.g., for machine learning)
ESS1.6 Embedded Software Development Case Studies (e.g., ANDROID development, ARM-based systems, RISC-V based systems etc.)

ESS2. Embedded System Design Methodologies

ESS2.1 Embedded system specification, virtual prototyping and simulation
ESS2.2 Embedded system synthesis and optimization
ESS2.3 Analysis of embedded system QoS metrics - performance, battery life, reliability, etc.
ESS2.4 Design methodologies for self-aware, self-adaptive and autonomous embedded systems
ESS2.5 Design methodology for mobile, wearable and Internet of Things devices

ESS3. Embedded Memory, Storage and Networking

ESS3.1 On-chip memory architectures and management: Scratchpads, compiler controlled memories, etc.
ESS3.2 Embedded storage systems organization and management
ESS3.3 Memory and Storage hierarchies with emerging memory technologies

ESS4. Time-Critical System Design

ESS4.1 Real-time analysis and tool flows
ESS4.2 WCET methods and tools for embedded hardware/software systems
ESS4.3 Mixed-Criticality system design

Security

SEC1. Hardware Security: Primitives, Architecture, Design & Test

SEC1.1 Hardware security primitives for cryptography, key generation, and authentication
SEC1.2 Trusted IP and system-on-chip (SoC) design and manufacturing
SEC1.3 Emerging technologies (Nanoscale devices, 3D, etc.) and security
SEC1.4 Hardware security verification, validation and test
SEC1.5 Post-quantum crypto algorithms and implementations
SEC1.6: Design automation for security and privacy preserving

SEC2. Hardware Security: Attack and Defense

SEC2.1 Hardware-enabled side-channel attacks and defenses
SEC2.2 Hardware supply chain protection and anti-counterfeiting
SEC2.3 Reverse engineering and hardware obfuscation
SEC2.4 AI/ML-based hardware attacks and defenses

SEC3. Embedded and Cross-Layer Security

SEC3.1 Embedded architecture, software and system-level techniques for security and privacy
SEC3.2 Cyber-physical systems, IoT and edge security
SEC3.3 Embedded security: metrics, models, verification and validation
SEC3.4 Cloud security
SEC3.5 Software-driven side-channel attacks and defenses
SEC3.6 Privacy preserving computing