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Peter Puschner

Peter Puschner

D-Index & Metrics

Computer Science

D-Index
34
Citations
7683
World Ranking
11951
National Ranking
101

Overview

Peter Puschner is affiliated with TU Wien in Austria and specializes in the field of Computer Science, particularly focusing on Hardware and Architecture, Computer Networks and Communications, and Electrical and Electronic Engineering. Their body of work includes contributions to subfields such as Computer Vision and Pattern Recognition and Control and Systems Engineering.

The scientist's research extensively covers topics including Real-Time Systems Scheduling, Network Time Synchronization Technologies, Parallel Computing and Optimization Techniques, Embedded Systems Design Techniques, Vehicular Ad Hoc Networks (VANETs), Distributed Systems and Fault Tolerance, and Context-Aware Activity Recognition Systems.

Selected recent publications include:

  • Vicuna: A Timing-Predictable RISC-V Vector Coprocessor for Scalable Parallel Computation (2021), published in Leibniz-Zentrum für Informatik (Schloss Dagstuhl)
  • Compiling for time-predictability with dual-issue single-path code (2021), published in Journal of Systems Architecture
  • A qualitative cybersecurity analysis of time-triggered communication networks in automotive systems (2023), published in Journal of Systems Architecture
  • A Quantitative Analysis of Interfaces to Time-Triggered Communication Buses (2021), published in IEEE/ACM Transactions on Networking
  • Predictable and optimized single-path code for predicated processors (2024), published in Journal of Systems Architecture

Frequent co-authors collaborating with Peter Puschner include:

  • Martin Schoeberl
  • Emad Jacob Maroun
  • Raimund Kirner
  • Michael Platzer
  • Eleftherios Kyriakakis

The scientist's work is regularly published in several academic venues, particularly:

  • Leibniz-Zentrum für Informatik (Schloss Dagstuhl)
  • Journal of Systems Architecture
  • SSRN Electronic Journal
  • Zenodo (CERN European Organization for Nuclear Research)
  • IEEE/ACM Transactions on Networking

Best Publications

  • The worst-case execution-time problem—overview of methods and survey of tools

    Reinhard Wilhelm;Jakob Engblom;Andreas Ermedahl;Niklas Holsti

  • Calculating the maximum, execution time of real-time programs

    P. Puschner;Ch. Koza

  • Guest Editorial: A Review of Worst-Case Execution-TimeAnalysis

    Peter Puschner;Alan Burns

  • Computing Maximum Task Execution Times — A Graph-BasedApproach

    Peter P. Puschner;Anton V. Schedl

  • Security Application of Failure Mode and Effect Analysis (FMEA)

    Christoph Schmittner;Thomas Gruber;Peter Puschner;Erwin Schoitsch

  • T-CREST

    Martin Schoeberl;Sahar Abbaspour;Benny Akesson;Neil Audsley

  • Testing the results of static worst-case execution-time analysis

    P. Puschner;R. Nossal

  • Writing temporally predictable code

    P. Puschner;A. Burns

  • Tolerating transient faults in MARS

    H. Kopetz;H. Kantz;G. Grunsteidl;P. Puschner

  • Measurement-Based Timing Analysis

    Ingomar Wenzel;Raimund Kirner;Bernhard Rieder;Peter P. Puschner

  • Automatic Timing Model Generation by CFG Partitioning and Model Checking

    Ingomar Wenzel;Bernhard Rieder;Raimund Kirner;Peter Puschner

  • Measurement-Based Worst-Case Execution Time Analysis using Automatic Test-Data Generation ∗

    Raimund Kirner;Peter Puschner;Ingomar Wenzel

  • Principles of timing anomalies in superscalar processors

    I. Wenzel;R. Kirner;P. Puschner;B. Rieder

  • The design of real-time systems: from specification to implementation and verification

    H. Kopetz;R. Zainlinger;G. Fohler;H. Kantz

  • Classification of WCET analysis techniques

    R. Kirner;P. Puschner

  • Obstacles in Worst-Case Execution Time Analysis

    R. Kirner;P. Puschner

  • Transformation of path information for WCET analysis during compilation

    R. Kirner;P. Puschner

  • Low-level analysis of a portable Java byte code WCET analysis framework

    I. Bate;G. Bernat;G. Murphy;P. Puschner

  • Developing real-time tasks with predictable timing

    G. Pospischil;P. Puschner;A. Vrchoticky;R. Zainlinger

  • Measurement-based worst-case execution time analysis

    I. Wenzel;R. Kirner;B. Rieder;P. Puschner

  • Using SAE J3061 for Automotive Security Requirement Engineering

    Christoph Schmittner;Zhendong Ma;Carolina Reyes;Oliver Dillinger

Frequent Co-Authors

Martin Schoeberl
Martin Schoeberl Technical University of Denmark
Alan Burns
Alan Burns University of York
Yiannis Papadopoulos
Yiannis Papadopoulos University of Hull
Reinhard Wilhelm
Reinhard Wilhelm Saarland University
David Whalley
David Whalley Florida State University
Per Stenström
Per Stenström Chalmers University of Technology
Frank Mueller
Frank Mueller North Carolina State University
Kees Goossens
Kees Goossens Eindhoven University of Technology
Alberto Sangiovanni-Vincentelli
Alberto Sangiovanni-Vincentelli University of California, Berkeley

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