World's Best Scientists 2026 revealed!

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
48
Citations
6424
World Ranking
3134
National Ranking
56

Overview

Yaojian Lin is affiliated with STATS ChipPAC Ltd in Singapore and has a research portfolio spanning biochemistry, genetics, molecular biology, and medicine. Their work extensively covers subfields such as biomedical engineering, cell biology, molecular biology, artificial intelligence, and pulmonary and respiratory medicine.

Lin's research topics include cellular mechanics and interactions, 3D printing in biomedical research, cancer cells and metastasis, cell image analysis techniques, microfluidic and bio-sensing technologies, tendon structure and treatment, and genomics and chromatin dynamics.

The scientist has published multiple papers in various peer-reviewed journals. Recent significant publications include:

  • Prostate lineage-specific metabolism governs luminal differentiation and response to antiandrogen treatment, 2023, Nature Cell Biology
  • Investigating heterogeneities of live mesenchymal stromal cells using AI-based label-free imaging, 2021, Scientific Reports
  • Stress decomposition in LAOS of dense colloidal suspensions, 2020, Journal of Rheology
  • Cell-cell adhesion impacts epithelia response to substrate stiffness: Morphology and gene expression, 2021, Biophysical Journal
  • Effect of luminal flow on doming of mpkCCD cells in a 3D perfusable kidney cortical collecting duct model, 2020, American Journal of Physiology-Cell Physiology

Frequent co-authors collaborating with Lin include Alexandra Bermudez, Jimmy K. Hu, Cho-Jui Hsieh, Marie C. Payne, and Sara Imboden.

The scientist's work is frequently published in venues such as Biophysical Journal, SSRN Electronic Journal, bioRxiv (Cold Spring Harbor Laboratory), arXiv (Cornell University), and Lab on a Chip.

Best Publications

  • Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP

    Yaojian Lin;XuSheng Bao;Kang Chen;Jianmin Fang

  • Semiconductor Package with Semiconductor Core Structure and Method of Forming Same

    Yaojian Lin;Jianmin Fang;Kang Chen;Haijing Cao

  • Semiconductor Device and Method of Forming Stress Relief Layer Between Die and Interconnect Structure

    Il Kwon Shim;Seng Guan Chow;Yaojian Lin

  • Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect units

    Yaojian Lin;Pandi Chelvam Marimuthu;Kang Chen;Yu Gu

  • Semiconductor device and method of forming TSV semiconductor wafer with embedded semiconductor die

    Reza A. Pagaila;Yaojian Lin;Seung Uk Yoon

  • Semiconductor device and method of forming TMV and TSV in WLCSP using same carrier

    Reza A. Pagaila;Yaojian Lin;Seung Wook Yoon

  • Semiconductor device and method of forming a PoP device with embedded vertical interconnect units

    Pandi C. Marimuthu;Yaojian Lin;Kang Chen;Yu Gu

  • Semiconductor Device and Method of Forming UBM Fixed Relative to Interconnect Structure for Alignment of Semiconductor Die

    Il Kwon Shim;Seng Guan Chow;Yaojian Lin;Rui Huang

  • SEMICONDUCTOR DEVICE WITH THREE-DIMENSIONAL VERTICALLY ORIENTED INTEGRATED CAPACITORS

    Huang Rui;Kuan Heap Hoe;Lin Yaojian;Chow Seng Guan

  • Semiconductor device and method of forming a shielding layer over a semiconductor die after forming a build-up interconnect structure

    Reza A. Pagaila;Rui Huang;Yaojian Lin

  • Semiconductor Device and Method of Forming Interconnect Structure for Encapsulated Die Having Pre-applied Protective Layer

    Il Kwon Shim;Yaojian Lin;Seng Guan Chow

  • Semiconductor device and method of forming vertical interconnect structure in substrate for IPD and baseband circuit separated by high-resistivity molding compound

    Yaojian Lin;Jianmin Fang;Kang Chen;Haijing Cao

  • Semiconductor device having electrical devices mounted to IPD structure and method of shielding electromagnetic interference

    Reza A. Pagaila;Byung Tai Do;Yaojian Lin;Rui Huang

  • Semiconductor Device and Method of Forming Interposer with Opening to Contain Semiconductor Die

    Reza A. Pagaila;Yaojian Lin;Jun Mo Koo;HeeJo Chi

  • Semiconductor device and method of forming integrated passive device module

    Yaojian Lin;Haijing Cao;Qing Zhang;Kang Chen

  • Semiconductor Device and Method of Forming High-Frequency Circuit Structure and Method Thereof

    Yaojian Lin;Jianmin Fang;Kang Chen;Haijing Cao

  • Next generation eWLB (embedded wafer level BGA) packaging

    Yonggang Jin;Xavier Baraton;S. W. Yoon;Yaojian Lin

  • Integrated circuit system having different-size solder bumps and different-size bonding pads

    Yaojian Lin;Byung Tai Do;Romeo Emmanuel P. Alvarez

  • Fanout flipchip eWLB (embedded Wafer Level Ball Grid Array) technology as 2.5D packaging solutions

    Seung Wook Yoon;Patrick Tang;Roger Emigh;Yaojian Lin

  • Semiconductor device and method of forming embedded passive circuit elements interconnected to through hole vias

    Reza A. Pagaila;Byung Tai Do;Yaojian Lin

Frequent Co-Authors

Reza A. Pagaila
Reza A. Pagaila STATS ChipPAC Ltd
Il Kwon Shim
Il Kwon Shim UTAC Group
Seng Guan Chow
Seng Guan Chow STATS ChipPAC Ltd
Byung Tai Do
Byung Tai Do STATS ChipPAC Ltd

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