World's Best Scientists 2026 revealed!

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
31
Citations
3411
World Ranking
6644
National Ranking
2164

Best Publications

  • A Systematic Approach to Modeling Impedances and Current Distribution in Planar Magnetics

    Minjie Chen;Mohammad Araghchini;Khurram K. Afridi;Jeffrey H. Lang

  • Stacked Switched Capacitor Energy Buffer Architecture

    Minjie Chen;Khurram K. Afridi;David J. Perreault

  • Vertical Stacked LEGO-PoL CPU Voltage Regulator

    Unknown

  • Multicell Reconfigurable Multi-Input Multi-Output Energy Router Architecture

    Yenan Chen;Ping Wang;Youssef Elasser;Minjie Chen

  • A Compact MMC Submodule Structure With Reduced Capacitor Size Using the Stacked Switched Capacitor Architecture

    Yuan Tang;Minjie Chen;Li Ran

  • Why MagNet: Quantifying the Complexity of Modeling Power Magnetic Material Characteristics

    Unknown

  • Virtual Intermediate Bus CPU Voltage Regulator

    Yenan Chen;Ping Wang;Hsin Cheng;Stephen Allen

  • Power Flow Control in Multi-Active-Bridge Converters: Theories and Applications

    Yenan Chen;Ping Wang;Haoran Li;Minjie Chen

  • Unified Models for Coupled Inductors Applied to Multiphase PWM Converters

    Minjie Chen;Charles Sullivan

  • Multitrack Power Conversion Architecture

    Minjie Chen;Khurram K. Afridi;Sombuddha Chakraborty;David J. Perreault

  • A superconducting nanowire can be modeled by using SPICE

    Karl K. Berggren;Qing Yuan Zhao;Nathnael Abebe;Minjie Chen

  • Dual-Band Wireless Power Transfer With Reactance Steering Network and Reconfigurable Receivers

    Unknown

  • MagNet: A Machine Learning Framework for Magnetic Core Loss Modeling

    Haoran Li;Seungjae Ryan Lee;Min Luo;Charles R. Sullivan

  • MSC-PoL: Hybrid GaN–Si Multistacked Switched-Capacitor 48-V PwrSiP VRM for Chiplets

    Unknown

  • Dual Frequency Hierarchical Modular Multilayer Battery Balancer Architecture

    Unknown

  • Neural Network as Datasheet: Modeling B-H Loops of Power Magnetics with Sequence-to-Sequence LSTM Encoder-Decoder Architecture

    Unknown

  • Vertical Stacked LEGO-PoL CPU Voltage Regulator

    Unknown

  • LEGO-PoL: A 93.1% 54V-1.5V 300A Merged-Two-Stage Hybrid Converter with a Linear Extendable Group Operated Point-of-Load (LEGO-PoL) Architecture

    Jaeil Baek;Ping Wang;Shuai Jiang;Minjie Chen

  • A Multilevel Energy Buffer and Voltage Modulator for Grid-Interfaced Microinverters

    Minjie Chen;Khurram K. Afridi;David J. Perreault

  • Differential Power Processing for Ultra-Efficient Data Storage

    Ping Wang;Yenan Chen;Jing Yuan;Robert C. N. Pilawa-Podgurski

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