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IEEE

International VLSI Symposium on Technology, Systems and Applications (VLSI-DAT)

Location: Hsinchu , Taiwan

Conference dates: 4/17/2023 - 4/20/2023

Research H-index
3

Ranking & Metrics

Discipline name Position Best Scientists Publications D-Index
Electronics and Electrical Engineering 606 18 27 3

Call for Papers

The scope of papers (TSA domain) requested in 2023 International VLSI Symposium on Technology, Systems and Applicationsincludes the following fields :

l Front-end CMOS and foundry technology

l Standalone memory: DRAM, FLASH, emerging memory technology

l Ultra-low power CMOS and embedded memory

l Advanced process modules: e.g. gate stack, junction, strain/channel engineering, low-R contact, low-C pacer/ILD, interconnect technology, ALE and selective deposition, etc.

l Nano-patterning: multiple patterning, directed self-Assembly, EUV, etc.

l Power and analog IC device and technology

l Advanced CMOS process and devices: Ge, SiGe, III-V, FinFET, GAAFET, low-dimensional materials and devices, 2D and nanowire devices

l BEOL compatible devices for 3D integration

l Material, process and device modeling

l Reliability physics, characterization and measurements

l Advanced packaging and 2.5D/3D Integration

l TFT and organic electronics

l MEMS, imagers and sensors

l Power and analog IC devices and technology

l Photonics and beyond CMOS technology

l RF & THz process, device and integration technology

l Energy harvesting technology

l Wearable and loE enabling technologies

l Quantum phenomena and information technologies

l Neuromorphic devices and materials for brain-inspired computing

l Device/circuit technologies for AI deep learning applications

l Advanced manufacturing technology, metrology and yield

DAT Call for Papers
Ü SCOPE
Analog, Mixed-Signal, and RF Design
• RF, Analog and Mixed-Signal Circuits
• Energy-Harvesting and Power Management Circuits
• Biomedical Circuits
• Sensor and Interface Circuits
• Wired and IO Design
Digital, Memory, and AI Chip Design
• Communication Baseband Designs
• Computing-in-Memory
• Digital Circuits and ASICs
• Hardware Security and Trust
• Low Voltage & Ultra Low-Power Circuits and Systems
• Memory Circuits and Systems
• Memristive and Neuromorphic Circuits
• Security Circuits for IoT and AI
• Specialized Hardware
Application, System, Software and Hardware Architecture
• AI for Systems and Systems for AI
• CPU, DSP, and Multicore Architectures
• Domain-Specific Architectures and Accelerators
• Embedded System and Software
• Hardware-efficient AI Methods
• Multimedia Processing Designs
• SoC (System on Chip) and NoC (Network on Chip) Architectures
• Software/Hardware Co-Design and System Compiler
• SiP (System-in-Package) and Heterogeneous Integration Designs
Design Automation and Test Methodology
• AI for Design Automation & Test
• Behavioral, Logic, and Physical Synthesis
• Design Automation & Test for Analog/Mixed-Signal/RF, 2D/3D IC, Memory, Biochip, AI Chips, and Emerging Systems
• Design for Manufacturability, Testability, and BIST
• Design Verification, Modeling, and Simulation
• Power/Thermal/Timing Optimization and On-Chip Monitoring
• Silicon Debug, Diagnosis, ECO, and Yield/Reliability Enhancement
• Test Generation, Compression, and Test Standards
Emerging Technology
• Circuit & IP Design Based on New Transistor Technology, e.g., Fork-Fin FET, Sheet FET, GAA FET, and C-FET
• Cryogenic Circuits and Systems
• Flexible and Printable Electronics
• Medical/Bio-electronics/Bio-inspired Chip Designs
• Quantum Computing
• Silicon Photonics

Overview

This authoritative ranking presents a comprehensive list of scientific conferences specializing in Engineering and Technology. The ranking has been meticulously prepared by Research.com, a leading platform for science research information across all major disciplines. Since 2014, Research.com has been dedicated to providing reliable data on scientific contributions, earning the trust of the global academic community.

Each conference’s position within the ranking is based on a proprietary bibliometric score developed by Research.com. This score incorporates both the estimated h-index and the number of leading scientists who have participated in the conference during the preceding three years, ensuring that the ranking reflects not only scholarly impact, but also strong scientific engagement. The Impact Score values presented are based on data collected as of 2024-11-27.

The rigorous process for developing this ranking involved the examination of over 2,262 conferences, which were carefully curated following in-depth analysis of more than 26,934 scientific documents published within the past three years by 9,385 distinguished and respected scientists in the field of Engineering and Technology. This multi-stage evaluation ensures that the ranking reliably highlights conferences demonstrating the highest levels of influence, relevance, and scholarly contribution.

Further details on the methodology used to compute the ranking scores, including criteria and calculation procedures, are provided for full transparency and can be accessed on our Methodology Page.

Papers citation over time

A key indicator for each conference is its effectiveness in reaching other researchers with the papers published at that venue.

The chart below presents the interquartile range (first quartile 25%, median 50% and third quartile 75%) of the number of citations of articles over time.

The top authors publishing at International Symposium on VLSI Design, Automation and Test (based on the number of publications) are:

  • Jiun-In Guo (14 papers) published 2 papers at the last edition, 1 more than at the previous edition,
  • Kuen-Jong Lee (12 papers) published 1 paper at the last edition, 1 less than at the previous edition,
  • Ching-Che Chung (11 papers) published 1 paper at the last edition the same number as at the previous edition,
  • Ding-Ming Kwai (10 papers) absent at the last edition,
  • Wei Hwang (10 papers) published 1 paper at the last edition, 1 less than at the previous edition.

The overall trend for top authors publishing at this conference is outlined below. The chart shows the number of publications at each edition of the conference for top authors.

Only papers with recognized affiliations are considered

The top affiliations publishing at International Symposium on VLSI Design, Automation and Test (based on the number of publications) are:

  • National Chiao Tung University (101 papers) published 8 papers at the last edition, 3 less than at the previous edition,
  • National Taiwan University (77 papers) published 5 papers at the last edition, 2 less than at the previous edition,
  • National Tsing Hua University (62 papers) published 5 papers at the last edition, 1 less than at the previous edition,
  • National Cheng Kung University (48 papers) published 4 papers at the last edition, 1 less than at the previous edition,
  • Industrial Technology Research Institute (39 papers) published 2 papers at the last edition, 7 less than at the previous edition.

The overall trend for top affiliations publishing at this conference is outlined below. The chart shows the number of publications at each edition of the conference for top affiliations.

Publication chance based on affiliation

The publication chance index shows the ratio of articles published by the best research institutions at the conference edition to all articles published within that conference. The best research institutions were selected based on the largest number of articles published during all editions of the conference.

The chart below presents the percentage ratio of articles from top institutions (based on their ranking of total papers).Top affiliations were grouped by their rank into the following tiers: top 1-10, top 11-20, top 21-50, and top 51+. Only articles with a recognized affiliation are considered.

During the most recent 2017 edition, 5.97% of publications had an unrecognized affiliation. Out of the publications with recognized affiliations, 47.62% were posted by at least one author from the top 10 institutions publishing at the conference. Another 11.11% included authors affiliated with research institutions from the top 11-20 affiliations. Institutions from the 21-50 range included 11.11% of all publications and 30.16% were from other institutions.

Returning Authors Index

A very common phenomenon observed among researchers publishing scientific articles is the intentional selection of conferences they have already attended in the past. In particular, it is worth analyzing the case when the authors participate in the same conference from year to year.

The Returning Authors Index presented below illustrates the ratio of authors who participated in both a given as well as the previous edition of the conference in relation to all participants in a given year.

Returning Institution Index

The graph below shows the Returning Institution Index, illustrating the ratio of institutions that participated in both a given and the previous edition of the conference in relation to all affiliations present in a given year.

The experience to innovation index

Our experience to innovation index was created to show a cross-section of the experience level of authors publishing at a conference. The index includes the authors publishing at the last edition of a conference, grouped by total number of publications throughout their academic career (P) and the total number of citations of these publications ever received (C).

The group intervals were selected empirically to best show the diversity of the authors' experiences, their labels were selected as a convenience, not as judgment. The authors were divided into the following groups:

  • Novice - P < 5 or C < 25 (the number of publications less than 5 or the number of citations less than 25),
  • Competent - P < 10 or C < 100 (the number of publications less than 10 or the number of citations less than 100),
  • Experienced - P < 25 or C < 625 (the number of publications less than 25 or the number of citations less than 625),
  • Master - P < 50 or C < 2500 (the number of publications less than 50 or the number of citations less than 2500),
  • Star - P ≥ 50 and C ≥ 2500 (both the number of publications greater than 50 and the number of citations greater than 2500).

The chart below illustrates experience levels of first authors in cases of publications with multiple authors.

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