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Research.com Recognitions

  • 1999 - IEEE Fellow For contributions to the design of integrated filters.

Overview

Rinaldo Castello is affiliated with École Polytechnique Fédérale de Lausanne in Switzerland. Their research primarily focuses on engineering, with a particular emphasis on electrical and electronic engineering as well as biomedical engineering and condensed matter physics.

The main topics of Rinaldo Castello's work include:

  • Radio Frequency Integrated Circuit Design
  • Analog and Mixed-Signal Circuit Design
  • Microwave Engineering and Waveguides
  • Advanced Power Amplifier Design
  • Energy Harvesting in Wireless Networks
  • Optical Network Technologies
  • Advanced Photonic Communication Systems

Frequent publication venues where Castello has contributed include:

  • ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference (ESSCIRC)
  • IEEE Journal of Solid-State Circuits
  • IEEE Solid-State Circuits Letters
  • IEEE Microwave and Wireless Components Letters
  • IEEE Open Journal of the Solid-State Circuits Society

Selected recent papers authored or co-authored by Castello cover various aspects of circuit design and receiver front-end technology. These include:

  • "Analysis and Design of a 260-MHz RF Bandwidth +22-dBm OOB-IIP3 Mixer-First Receiver With Third-Order Current-Mode Filtering TIA" (2020), published in IEEE Journal of Solid-State Circuits
  • "Design Considerations for a Sub-mW Receiver Front-End for Internet-of-Things" (2021), published in IEEE Open Journal of the Solid-State Circuits Society
  • "A 42-GHz TIA in 28-nm CMOS With Less Than 1.8% THD for Optical Coherent Receivers" (2020), published in IEEE Solid-State Circuits Letters
  • "A 400-μW IoT Low-IF Voltage-Mode Receiver Front-End With Charge-Sharing Complex Filter" (2022), published in IEEE Journal of Solid-State Circuits
  • "A Highly Linear SAW-Less Noise-Canceling Receiver With Shared TIAs Architecture" (2021), published in IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Among frequent co-authors collaborating with Castello are Danilo Manstretta, Jin Jin, Jianhui Wu, Nicola Cordioli, and Nimesh Nadishka Miral.

Rinaldo Castello was recognized as an IEEE Fellow in 1999 for contributions to the design of integrated filters.

Best Publications

  • A ratio-independent algorithmic analog-to-digital conversion technique

    P.W. Li;M.J. Chin;P.R. Gray;R. Castello

  • A high-performance micropower switched-capacitor filter

    R. Castello;P.R. Gray

  • A 1 V 1.8 MHz CMOS switched-opamp SC filter with rail-to-rail output swing

    A. Baschirotto;R. Castello

  • A 700-kHz bandwidth /spl Sigma//spl Delta/ fractional synthesizer with spurs compensation and linearization techniques for WCDMA applications

    E. Temporiti;G. Albasini;I. Bietti;R. Castello

  • A 0.13 /spl mu/m CMOS front-end, for DCS1800/UMTS/802.11b-g with multiband positive feedback low-noise amplifier

    A. Liscidini;M. Brandolini;D. Sanzogni;R. Castello

  • A 72-mW CMOS 802.11a direct conversion front-end with 3.5-dB NF and 200-kHz 1/f noise corner

    M. Valla;G. Montagna;R. Castello;R. Tonietto

  • Two-Dimensions Vernier Time-to-Digital Converter

    Luca Vercesi;Antonio Liscidini;Rinaldo Castello

  • Wireless multi-standard terminals: system analysis and design of a reconfigurable RF front-end

    F. Agnelli;G. Albasini;I. Bietti;A. Gnudi

  • A 1.3 GHz low-phase noise fully tunable CMOS LC VCO

    F. Svelto;S. Deantoni;R. Castello

  • Low-voltage analog filters

    R. Castello;F. Montecchi;F. Rezzi;A. Baschirotto

  • SAW-less analog front-end receivers for TDD and FDD

    Ivan Fabiano;Marco Sosio;Antonio Liscidini;Rinaldo Castello

  • A 15 mW, 70 kHz 1/f corner direct conversion CMOS receiver

    E. Sacchi;I. Bietti;S. Erba;L. Tee

  • An eighth-order CMOS low-pass filter with 30-120 MHz tuning range and programmable boost

    G. Bollati;S. Marchese;M. Demicheli;R. Castello

  • A 2-dB noise figure 900-MHz differential CMOS LNA

    F. Gatta;E. Sacchi;F. Svelto;P. Vilmercati

  • Performance limitations in switched- capacitor filters

    R. Castello;P. Gray

  • A metal-oxide-semiconductor varactor

    F. Svelto;P. Erratico;S. Manzini;R. Castello

  • A CMOS low-distortion fully differential power amplifier with double nested Miller compensation

    S. Pernici;G. Nicollini;R. Castello

  • Tunable BiCMOS continuous-time filter for high-frequency applications

    R. Alini;A. Baschirotto;R. Castello

  • Single-stage low-power quadrature RF receiver front-end : The LMV cell

    Antonio Liscidini;Andrea Mazzanti;Riccardo Tonietto;Luca Vandi

  • A 3 V 12-55 MHz BiCMOS pseudo-differential continuous-time filter

    F. Rezzi;A. Baschirotto;R. Castello

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