World's Best Scientists 2026 revealed!

D-Index & Metrics

Computer Science

D-Index
32
Citations
3640
World Ranking
13267
National Ranking
122

Best Publications

  • BioRoute: A Network-Flow-Based Routing Algorithm for the Synthesis of Digital Microfluidic Biochips

    Ping-Hung Yuh;Chia-Lin Yang;Yao-Wen Chang

  • Optimizing NAND flash-based SSDs via retention relaxation

    Ren-Shuo Liu;Chia-Lin Yang;Wei Wu

  • Sparse ReRAM engine: joint exploration of activation and weight sparsity in compressed neural networks

    Tzu-Hsien Yang;Hsiang-Yun Cheng;Chia-Lin Yang;I-Ching Tseng

  • NVM duet: unified working memory and persistent store architecture

    Ren-Shuo Liu;De-Yu Shen;Chia-Lin Yang;Shun-Chih Yu

  • Multiprocessor energy-efficient scheduling with task migration considerations

    Jian-Jia Chen;Heng-Ruey Hsu;Kai-Hsiang Chuang;Chia-Lin Yang

  • Push vs. pull: data movement for linked data structures

    Chia-Lin Yang;Alvin R. Lebeck

  • Age-based PCM wear leveling with nearly zero search cost

    Chi-Hao Chen;Pi-Cheng Hsiu;Tei-Wei Kuo;Chia-Lin Yang

  • Placement of defect-tolerant digital microfluidic biochips using the T-tree formulation

    Ping-Hung Yuh;Chia-Lin Yang;Yao-Wen Chang

  • BioRoute: a network-flow based routing algorithm for digital microfluidic biochips

    Ping-Hung Yuh;Chia-Lin Yang;Yao-Wen Chang

  • Zero-aware asymmetric SRAM cell for reducing cache power in writing zero

    Yen-Jen Chang;Feipei Lai;Chia-Lin Yang

  • Obstacle-Avoiding Rectilinear Steiner Tree Construction Based on Spanning Graphs

    Chung-Wei Lin;Szu-Yu Chen;Chi-Feng Li;Yao-Wen Chang

  • Improving DRAM latency with dynamic asymmetric subarray

    Shih-Lien Lu;Ying-Chen Lin;Chia-Lin Yang

  • A progressive-ILP based routing algorithm for cross-referencing biochips

    Ping-Hung Yuh;Sachin Sapatnekar;Chia-Lin Yang;Yao-Wen Chang

  • Efficient and Robust Parallel DNN Training through Model Parallelism on Multi-GPU Platform

    Unknown

  • An energy-efficient virtual memory system with flash memory as the secondary storage

    Hung-Wei Tseng;Han-Lin Li;Chia-Lin Yang

  • Temporal floorplanning using the T-tree formulation

    Ping-Hung Yuh;Chia-Lin Yang;Yao-Wen Chang

  • Power gating strategies on GPUs

    Po-Han Wang;Chia-Lin Yang;Yen-Ming Chen;Yu-Jung Cheng

  • SECRET: Selective error correction for refresh energy reduction in DRAMs

    Chung-Hsiang Lin;De-Yu Shen;Yi-Jung Chen;Chia-Lin Yang

  • DL-RSIM: a simulation framework to enable reliable ReRAM-based accelerators for deep learning

    Meng-Yao Lin;Hsiang-Yun Cheng;Wei-Ting Lin;Tzu-Hsien Yang

  • Thermal modeling for 3D-ICs with integrated microchannel cooling

    Hitoshi Mizunuma;Chia-Lin Yang;Yi-Chang Lu

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