World's Best Scientists 2026 revealed!

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
35
Citations
5385
World Ranking
5544
National Ranking
247

Overview

Sudip Shekhar is affiliated with the University of British Columbia in Canada and is primarily involved in research within the field of Engineering, focusing on Electrical and Electronic Engineering as well as related subfields such as Artificial Intelligence, Atomic and Molecular Physics, and Optics.

Their work spans several key topics including Photonic and Optical Devices, Optical Network Technologies, Neural Networks and Reservoir Computing, Advanced Photonic Communication Systems, Advanced Fiber Laser Technologies, Radio Frequency Integrated Circuit Design, and Mechanical and Optical Resonators.

Shekhar's recent publications include:

  • Roadmapping the next generation of silicon photonics, 2024, Nature Communications
  • Silicon photonic architecture for training deep neural networks with direct feedback alignment, 2022, Optica
  • Scaling up silicon photonic-based accelerators: Challenges and opportunities, 2022, APL Photonics
  • Polymer modulators in silicon photonics: review and projections, 2022, Nanophotonics
  • 120 GOPS Photonic tensor core in thin-film lithium niobate for inference and in situ training, 2024, Nature Communications

Frequent coauthors that collaborate with Sudip Shekhar include Lukas Chrostowski, Bhavin J. Shastri, Nicolas A. F. Jaeger, Paul R. Prucnal, and Mohammed Al-Qadasi.

Shekhar has contributed extensively to multiple publication venues, notably:

  • arXiv (Cornell University)
  • Optics Express
  • IEEE Journal of Solid-State Circuits
  • Nature Communications
  • Conference on Lasers and Electro-Optics

Best Publications

  • Roadmapping the next generation of silicon photonics

    Unknown

  • Bandwidth Extension Techniques for CMOS Amplifiers

    S. Shekhar;J.S. Walling;D.J. Allstot

  • A capacitor cross-coupled common-gate low-noise amplifier

    W. Zhuo;X. Li;S. Shekhar;S.H.K. Embabi

  • G/sub m/-boosted common-gate LNA and differential colpitts VCO/QVCO in 0.18-/spl mu/m CMOS

    Xiaoyong Li;S. Shekhar;D.J. Allstot

  • Design considerations for CMOS low-noise amplifiers

    D.J. Allstot;Xiaoyong Li;S. Shekhar

  • Wavelength tuning and stabilization of microring-based filters using silicon in-resonator photoconductive heaters.

    Hasitha Jayatilleka;Kyle Murray;Miguel Ángel Guillén-Torres;Michael Caverley

  • Feedback control for microring weight banks

    Alexander N. Tait;Hasitha Jayatilleka;Thomas Ferreira De Lima;Philip Y. Ma

  • Prospects and applications of photonic neural networks

    Chaoran Huang;Chaoran Huang;Volker J. Sorger;Mario Miscuglio;Mohammed Al-Qadasi

  • Scaling Up Silicon Photonic-based Accelerators: Challenges and Opportunities, and Roadmapping with Silicon Photonics 2.0

    Unknown

  • A Scalable 0.128–1 Tb/s, 0.8–2.6 pJ/bit, 64-Lane Parallel I/O in 32-nm CMOS

    Mozhgan Mansuri;James E. Jaussi;Joseph T. Kennedy;Tzu-Chien Hsueh

  • Silicon Photonic Architecture for Training Deep Neural Networks with Direct Feedback Alignment

    Unknown

  • Strong Injection Locking in Low- $Q$ LC Oscillators: Modeling and Application in a Forwarded-Clock I/O Receiver

    S. Shekhar;G. Balamurugan;D.J. Allstot;M. Mansuri

  • A 47 $\, imes\,$ 10 Gb/s 1.4 mW/Gb/s Parallel Interface in 45 nm CMOS

    Frank O'Mahony;James E Jaussi;Joseph Kennedy;Ganesh Balamurugan

  • An Integrated Discrete-Time Delay-Compensating Technique for Large-Array Beamformers

    Erfan Ghaderi;Ajith Sivadhasan Ramani;Arya A. Rahimi;Deukhyoun Heo

  • Silicon Photonic Circuit Design Using Rapid Prototyping Foundry Process Design Kits

    Lukas Chrostowski;Hossam Shoman;Mustafa Hammood;Han Yun

  • Polymer modulators in silicon photonics: review and projections

    Unknown

  • Photoconductive heaters enable control of large-scale silicon photonic ring resonator circuits

    Hasitha Jayatilleka;Hossam Shoman;Lukas Chrostowski;Sudip Shekhar

  • A 4-32 Gb/s Bidirectional Link With 3-Tap FFE/6-Tap DFE and Collaborative CDR in 22 nm CMOS

    Tawfiq Musah;James E. Jaussi;Ganesh Balamurugan;Sami Hyvonen

  • The future of electrical I/O for microprocessors

    Frank O'Mahony;Ganesh Balamurugan;James E. Jaussi;Joseph Kennedy

  • On the Design of mm-Wave Self-Mixing-VCO Architecture for High Tuning-Range and Low Phase Noise

    Amir Hossein Masnadi Shirazi;Amir Nikpaik;Reza Molavi;Sam Lightbody

  • A 219-to-231 GHz Frequency-Multiplier-Based VCO With ~3% Peak DC-to-RF Efficiency in 65-nm CMOS

    Amir Nikpaik;Amir Hossein Masnadi Shirazi;Abdolreza Nabavi;Shahriar Mirabbasi

  • A 27Gb/s Forwarded-Clock I/O Receiver Using an Injection-Locked LC-DCO in 45nm CMOS

    F. O'Mahony;S. Shekhar;M. Mansuri;G. Balamurugan

  • In-Band Full Duplex Broadband Power Line Communications

    Gautham Prasad;Lutz Lampe;Sudip Shekhar

  • A CMOS 3.1-10.6 GHz UWB LNA employing stagger-compensated series peaking

    S. Shekhar;X. Li;D.J. Allstot

  • -Boosted Common-Gate LNA and Differential

    Xiaoyong Li;Sudip Shekhar;David J. Allstot

Frequent Co-Authors

Lukas Chrostowski
Lukas Chrostowski University of British Columbia
Nicolas A. F. Jaeger
Nicolas A. F. Jaeger University of British Columbia
Shahriar Mirabbasi
Shahriar Mirabbasi University of British Columbia
Bryan K. Casper
Bryan K. Casper Intel (United States)
Paul R. Prucnal
Paul R. Prucnal Princeton University
Lutz Lampe
Lutz Lampe University of British Columbia
Shreyas Sen
Shreyas Sen Purdue University West Lafayette
Volker J. Sorger
Volker J. Sorger George Washington University
Alexander V. Rylyakov
Alexander V. Rylyakov Nokia (United States)
Deukhyoun Heo
Deukhyoun Heo Washington State University

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