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D-Index & Metrics

Electronics and Electrical Engineering

D-Index
33
Citations
6386
World Ranking
5945
National Ranking
1996

Best Publications

  • A 10-b 20-Msample/s analog-to-digital converter

    S.H. Lewis;H.S. Fetterman;G.F. Gross;R. Ramachandran

  • A pipelined 5-Msample/s 9-bit analog-to-digital converter

    S.H. Lewis;P.R. Gray

  • A digital background calibration technique for time-interleaved analog-to-digital converters

    Daihong Fu;K.C. Dyer;S.H. Lewis;P.J. Hurst

  • A 10b 120MSample/s time-interleaved analog-to-digital converter with digital background calibration

    S.M. Jamal;Daihong Fu;P.J. Hurst;S.H. Lewis

  • A 250-mW, 8-b, 52-Msamples/s parallel-pipelined A/D converter with reduced number of amplifiers

    K. Nagaraj;H.S. Fetterman;J. Anidjar;S.H. Lewis

  • Optimizing the stage resolution in pipelined, multistage, analog-to-digital converters for video-rate applications

    S.H. Lewis

  • Calibration of sample-time error in a two-channel time-interleaved analog-to-digital converter

    S.M. Jamal;Daihong Fu;M.P. Singh;P.J. Hurst

  • A CMOS bandgap reference without resistors

    A.E. Buck;C.L. McDonald;S.H. Lewis;T.R. Viswanathan

  • Background interstage gain calibration technique for pipelined ADCs

    J.P. Keane;P.J. Hurst;S.H. Lewis

  • A 12-bit 20-Msample/s pipelined analog-to-digital converter with nested digital background calibration

    Xiaoyue Wang;P.J. Hurst;S.H. Lewis

  • An 8-bit 80-Msample/s pipelined analog-to-digital converter with background calibration

    Jun Ming;S.H. Lewis

  • A 12 b digital-background-calibrated algorithmic ADC with -90 dB THD

    O.E. Erdogan;P.J. Hurst;S.H. Lewis

  • A 12-bit 80-MSample/s pipelined ADC with bootstrapped digital calibration

    C.R. Grace;P.J. Hurst;S.H. Lewis

  • Miller compensation using current buffers in fully differential CMOS two-stage operational amplifiers

    P.J. Hurst;S.H. Lewis;J.P. Keane;F. Aram

  • A 1.4 V Supply CMOS Fractional Bandgap Reference

    R.T. Perry;S.H. Lewis;A.P. Brokaw;T.R. Viswanathan

  • A Four-Channel Time-Interleaved ADC With Digital Calibration of Interchannel Timing and Memory Errors

    Chi Ho Law;P J Hurst;S H Lewis

  • Bandwidth Mismatch and Its Correction in Time-Interleaved Analog-to-Digital Converters

    Tsung-Heng Tsai;P.J. Hurst;S.H. Lewis

  • Digital background calibration for memory effects in pipelined analog-to-digital converters

    J.P. Keane;P.J. Hurst;S.H. Lewis

  • A Level-Crossing Analog-to-Digital Converter With Triangular Dither

    Tunde Wang;Dong Wang;P.J. Hurst;B.C. Levy

  • A second-order double-sampled delta-sigma modulator using additive-error switching

    T.V. Burmas;K.C. Dyer;P.J. Hurst;S.H. Lewis

  • Convergence analysis of a background interstage gain calibration technique for pipelined ADCs

    Dong Wang;J.P. Keane;P.J. Hurst;B.C. Levy

Frequent Co-Authors

Paul J. Hurst
Paul J. Hurst University of California, Davis
Bernard C. Levy
Bernard C. Levy University of California, Davis
George Gross
George Gross University of Illinois at Urbana-Champaign
Michael Peter Kennedy
Michael Peter Kennedy University College Dublin

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