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SPIE Advanced Lithography + Patterning

SPIE Advanced Lithography + Patterning

San Jose, United States

Submission Deadline: Wednesday 14 Sep 2022

Conference Dates: Feb 26, 2023 - Mar 02, 2023

Impact Score 0.70


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Ranking & Metrics Impact Score is a novel metric devised to rank conferences based on the number of contributing the best scientists in addition to the h-index estimated from the scientific papers published by the best scientists. See more details on our methodology page.

Research Impact Score: 0.70
Contributing Best Scientists: 6
Papers published by Best Scientists 9
Research Ranking (Electronics and Electrical Engineering) 425
Research Ranking (Materials Science) 28
Research Ranking (Chemistry) 10
Research Ranking (Physics) 92

Conference Call for Papers

Optical and EUV Nanolithography XXXVI

optical lithography equipment
optical mask-less exposure tools
optical and EUV tool design and innovation
high-NA EUV imaging systems
throughput, defectivity, and productivity
imaging performance
focus, dose, overlay control, and budgets
aberrations, flare, and out-of-band light.
light sources for EUV and optical lithography systems
power scaling of EUV sources
efficiency and reliability
source characterization
EUV source collectors, cleaning, and lifetime.
substrates and blanks
patterned and blank mask inspection
actinic, e-beam, and DUV inspection methods
defect characterization, mitigation, and repair
optical and EUV mask absorber materials and patterning
mask process
mask roughness
pellicle development and platform integration
mask architectures for higher numerical apertures
mask writing techniques
mask design fit to multi-beam mask writers.
optical system and mask induced defect, electrical, and yield signatures
resolution enhancement techniques
imaging simulations and source-mask optimization (SMO)
optical and EUV lithography mixing
EUV to optical matching
multi-patterning, 193i, and EUVL
edge placement control
on-product overlay control
EUV process optimization
stochastics control.
equipment design and characterization for non-IC applications
light sources for non-IC applications
mask technology for non-IC applications.

DTCO and Computational Patterning II

Topics of interest include, but are not limited to:

Design Technology Co-Optimization (DTCO) and System Technology Co-Optimization (STCO)
pattern-based design optimization
design-intent to manufacturing
performance-power-manufacturability optimization
layout style and lithography co-optimization (including optical source and design co- optimization)
design for novel patterning process
design optimization for technology
DTCO for standard cells and memory including standard cell, SRAM, and digital designs
DTCO for device, Integration, and tools
STCO and 3D integration
3D packaging, integration and heterogeneous integration and its impact to design, DFM, OPC and other fields.
Design for Manufacturing (DFM), Design for Yield (DFY): Technology, IP and System
physical layout optimization
design-rule development strategies and methodologies
layout optimization for systematic and random yield loss reduction
layout optimization for minimizing circuit variability
design and verification methodologies including hot spot analysis
manufacturing friendly circuit design styles and methodologies
design-to-manufacturing methodologies for analog circuits, MEMS, and other microlithography applications
design-to-manufacturing economics
cost-performance tradeoffs between design and manufacturing
design-to-manufacturing flow methodologies for productivity improvement, time-to-market, and cost reduction
DFM for "more than Moore" applications (analog, RF, digital/SoC, etc.).
Computational Patterning (EUV and DUV)
computational patterning consideration for anamorphic high-NA EUV, including stitching impacts on design and DTCO applications for mitigation
new approaches for multi-patterning, decomposition, and interaction with design and patterning
propagating electrical design intent for RET/OPC and manufacturing optimization and verification.
Deep Learning, Machine Learning, and AI Techniques
machine learning on design, process, mask, and OPC methodologies
new machine learning concepts and algorithms that are potentially applicable to semiconductor industry
data analytics for layout analysis and optimization or process modeling and control.
Modeling, Simulation, and Computation
modeling for accuracy and defect detection
applications of new computation architectures such as quantum computing, TPU, etc.

Metrology, Inspection, and Process Control XXXVII

Metrology and Inspection
optical full-field and scanned microscopy, scatterometry, and interference microscopy
novel measurement techniques with high-resolution optics, scatterometry, SEM, AFM, x-ray
particle-beam scanned microscopy, materials characterization, and elemental analysis
design rules, design compliance, hot spots, design-based metrology and inspection
metrology for design rules and process margins, budgeting, and budget control
metrology for lithography development, patterning model build, and validation
metrology on photomasks, including pre-compensation, OPC, and phase shifting
machine learning in metrology and inspection for capability and productivity
hybrid metrology, including computational or virtual metrology
parametric electrical testing and other device performance-based metrology
applications in emerging patterning technologies including optical immersion and EUV lithography, direct-write, nano-imprint, and directed self-assembly
applications in manufacturing of ICs, cell stacking, wafer bonding, TSV and 3D integration, displays, thin-film heads, MEMS, MOEMS, bio-arrays, lab-on-the-chip, integrated optoelectronics and other micro- and nano-systems.
Critical Dimension, Pattern Placement, and Overlay
1D, 2D, and 3D metrology of CD and pattern placement, including within device layouts
alignment, registration and overlay metrology, processing and metrology integration
feature edge, edge profile and edge position, roughness of edge, width, and centerline
optical, SEM, and AFM based in-die overlay on small targets and devices.
Measurement System Modeling and Simulation
physics and mathematical models of metrology process and detection methods
physical characterization of both systems and samples, model parameters
data analysis methods, library-based image analysis, and algorithms.
Calibration and Accuracy
metrology quality, error diagnostics, and data culling
measurement resolution and error, including precision and accuracy
standards and reference materials, calibration methods, hybrid metrologies
reference measurement systems and metrology comparisons
tool fleet performance, maintenance, and matching.
Process Characterization, Control, Performance, and Yield
process metrology and monitors, segmentation, and reduction of variance
metrology sampling, excursion detection, costs, device performance, and yield
data analysis and visualization, modeling and fingerprint detection
advanced process control, data feedback, and feed forward
big data analysis and diagnostic methodologies, data management.
Defect Detection, Analysis, and Control
detection and control of systematic, random, and low photon count stochastic pattern defects
defect review, defect reduction, yield improvement, and effective data use
artificial intelligence and machine learning applied to defect detection, analysis, and control
environmental contamination, including impacts on processing and defects.
Performance Limits in Metrology and Inspection
responses to commanded skews and cross-technology comparisons
models of tool-sample interaction, noise, and error mechanisms.

Novel Patterning Technologies 2023

Application Areas for Novel Patterning Technologies
functional nanopatterning materials and emerging IoT applications
novel patterning for semiconductor 7nm IC nodes and beyond
MEMS/NEMS, MOEMS, and microsystems
metasurfaces and metamaterials
photonic and/or phononic crystals
micro/nanofluidics, lab-on-a-chip, or other bio-applications
digital micro-mirror arrays
multi-beam writing of masks and master templates
semiconductor wafer-level packaging and fan-out
bioelectronics and genomics/proteomics
photovoltaics and related energy applications
large-area display/flat-panel displays
roll-to-roll/web format device manufacturing
micro LED array fabrication
nanopatterned sensors, waveguides, antennas
building blocks for defect-tolerant computing
smart resists and self-healing materials
tools/materials to improve existing scanner performance
quantum computing devices and qubit-technologies
3D integration and materials
neuromorphic and emerging memory patterning
atomistic nanoelectronic devices.


Direct Write or Maskless Lithography and Patterning Technologies

electron or ion charged-particle beams
optical beams
STED, multi-color/multi-photon direct write
resistless e-beam or ion beam direct patterning
beam-directed nucleation, ion-beam deposition
material ablation or material transformation reactions
scanning probe lithography, dip-pen printing, tip-based patterning
interference, plasmonic or nearfield/evanescent wave lithography
micromirror optical lithography
3D metal or ceramic sintering.
Process-based Lithography and Patterning
directed self-assembly
nanoimprint lithography
selective deposition
self-aligned or pitch division process integration techniques
colloidal self-assembly and DNA patterning
3D patterning.

Advances in Patterning Materials and Processes XL

Patterning Materials, Processes, and Applications
photoresists for EUV and 193nm (immersion) lithography
photoresists for other wavelengths: electron beam or other maskless lithography, 248nm, i-line, and g-line
novel development techniques: positive and negative tone (PTD, NTD) resists and developers, solvent, aqueous, or dry development processes
multi-layer patterning materials: underlayers for reflection control, planarization, pattern transfer, and process enhancement
selective deposition and surface modification of organic and inorganic materials: chemistry, processing, and materials science, bottom-up approaches
self-assembling materials (DSA): chemistry and materials science, processing, and ancillary materials
materials and processes used in vertical integration of novel devices, stacked structures, nanosheets, nanotubes, solvent based or dry processes
materials for packaging and SOC/SIP integration
materials for patterning and optical control of AR/VR applications
PFAS/PFOS alternative materials, roadmap for dealing with regulatory legislation and plans for phasing out of these materials by the supplier community.
Processing and Process Control
single and multiple patterning
resist smoothing, rectification, trim and shrink, and tone inversion
applied processing, including filtration, defect control, and pattern collapse mitigation
materials challenges related to etch, process control, and metrology
new processing techniques and applications, especially self-aligned and additive strategies.
Simulation and Modeling
resist fundamentals and assessment of patterning and materials scaling limits
variability, stochastics, and defectivity
design for or simulation of new processes and applications
AI and ML approaches to materials design, characterization, patterning, and process control.

Advanced Etch Technology and Process Integration for Nanopatterning XII

Original and overview technical papers are solicited on, but not limited to, the following topics:
novel developments in plasma-based patterning techniques: EUV-based patterning, self-aligned spacer techniques (SAxP and mandrel/spacer design), optical lithography patterning, complementary patterning and optical/EUV tradeoffs, self-aligned structures, on product overlay, edge placement error mitigation strategies, and cost modelling of the proposed patterning schemes
novel discoveries of plasma-material interactions: plasma-photoresist interactions, LER/LWR/stochastics mitigation, MOL/BEOL (low-k) material interactions, novel substrate material handling (SiGe, III-V, C, nonvolatile memory) etc.
etch challenges for 3D memory and logic architectures
defect reduction or yield enhancement techniques by dry or wet process solutions
new etch methodologies and their application to patterning processes, e.g.: atomic layer etching (ALE), low Te processing, high aspect ratio pattern definition, selective deposition
patterning control through advanced process solutions: in-situ process control, process simulations, etch-aware OPC, edge place error (EPE) etc.
machine-learning-based methodologies for process or equipment development for patterning
novel integration strategies for pattern fidelity improvement, new design enablement, etc.
advanced patterning, process, and selective deposition tools and processes for novel etch-pattern transfer applications
applications of novel patterning transfer techniques to improve mask variability
novel holistic (litho, etch, and deposition) patterning solutions for logic and memory applications
advanced patterning solutions for emerging product applications including but not limited to: AR/VR, neuromorphic computing, quantum computing, power semiconductors (GaN, others), IoT devices, MEMS, MOEMS, other “more than Moore devices” and derivative technologies (RF, analog or mixed signal)
advanced integration and patterning solutions for photonic devices including photonic integrated circuit devices operating at IR, NIR or visible wavelength range; LED device technology for display technology
advances in etch or patterning technology that enables sustainability goals for the semiconductor industry.

Previous Editions

Advanced Lithography + Patterning

Feb 27, 2022 - Mar 03, 2022

San Jose, United States

SPIE Advanced Lithography + Patterning

Feb 26, 2023 - Mar 02, 2023

San Jose, United States

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