Ranking & Metrics Conference Call for Papers Other Conferences in United States
28th Asia and South Pacific Design Automation Conference

28th Asia and South Pacific Design Automation Conference

Tokyo, Japan

Submission Deadline: Sunday 24 Jul 2022

Conference Dates: Jan 16, 2023 - Jan 19, 2023

Research
Impact Score 5.61

Conference Organizers: Deadline extended?
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Ranking & Metrics Impact Score is a novel metric devised to rank conferences based on the number of contributing the best scientists in addition to the h-index estimated from the scientific papers published by the best scientists. See more details on our methodology page.

Research Impact Score: 5.61
Contributing Best Scientists:
H5-index: 29
Papers published by Best Scientists
Research Ranking (Computer Science) 82

Conference Call for Papers

Areas of Interest:
Original papers in, but not limited to, the following areas are invited.

1 System-Level Modeling and Design Methodology:
1.1. HW/SW co-design, co-simulation and co-verification
1.2. System-level design exploration, synthesis, and optimization
1.3. System-level formal verification
1.4. System-level modeling, simulation and validation
1.5. Networks-on-chip and NoC-based system design
2 Embedded, Cyberphysical (CSP) and IoT Systems:
2.1. Many- and multi-core SoC architecture
2.2. IP/platform-based SoC design
2.3. Domain-specific architecture
2.4. Dependable architecture
2.5. Cyber physical system
2.6. Internet of things
3 Embedded Systems Software:
3.1. Kernel, middleware, and virtual machine
3.2. Compiler and toolchain
3.3. Real-time system
3.4. Resource allocation for heterogeneous computing platform
3.5. Storage software and application
3.6. Human-computer interface
4 Memory Architecture and Near/In Memory Computing:
4.1. Storage system and memory architecture
4.2. On-chip memory architectures and management: Scratchpads, compiler, controlled memories, etc.
4.3. Memory/storage hierarchies with emerging memory technologies
4.4. Near-memory and in-memory computing
4.5. Memory architecture and management for emerging memory technologies
5 AI/Machine Learning Circuits, Architecture, System Designs and Applications:
5.1. Hardware and devices for deep neural networks
5.2. Design method for learning on a chip
5.3. Systems and design methods for deep neural computing
5.4. Neural network acceleration co-design techniques
5.5. Design techniques for AI of Things
5.6. Novel reconfigurable architectures including FPGAs for AI/MLs
5.7. Efficient ML training and inference
6 Photonic/RF/Analog-Mixed Signal Design:
6.1. Analog/mixed-signal/RF synthesis
6.2. Analog layout, verification, and simulation techniques
6.3. High-frequency electromagnetic simulation of circuit
6.4. Mixed-signal design consideration
6.5. Communication and computing using photonics
7 Approximate, Bio-Inspired and Neuromorphic Computing:
7.1. Circuit and system techniques for approximate and stochastic computing
7.2. Neuromorphic computing
7.3. CAD for approximate and stochastic systems
7.4. CAD for bio-inspired and neuromorphic systems
8 High-Level, Behavioral, and Logic Synthesis and Optimization:
8.1. High-level/Behavioral synthesis tool and methodology
8.2. Combinational, sequential and asynchronous logic synthesis
8.3. Technology mapping, resource scheduling, allocation and synthesis
8.4. Functional and logic timing ECO (Engineering change order)
8.5. Interaction between logic synthesis and physical design
9 Physical Design and Timing Analysis:
9.1. Floorplanning, partitioning and placement and routing optimization
9.2. Interconnect planning and synthesis
9.3. Clock network synthesis
9.4. Post layout and post-silicon optimization
9.5. Package/PCB/3D-IC routing
9.6. Extraction, TSV and package modeling
9.7. Deterministic/statistical timing analysis and optimization
9.8. Signal/Power integrity, EM modeling and analysis
10 Design for Manufacturability/Reliability and Low Power:
10.1. Reticle enhancement, lithography-related design and optimization
10.2. Resilience under manufacturing variation
10.3. Design for manufacturability, yield, and defect tolerance
10.4. Reliability, robustness, aging and soft error analysis
10.5. Power modeling, analysis and simulation
10.6. Low-power design and optimization at circuit and system levels
10.7. Thermal aware design and dynamic thermal management
10.8. Energy harvesting and battery management
11 Testing, Validation, Simulation, and Verification:
11.1. ATPG, BIST and DFT
11.2. System test and 3D IC test, Online test and fault tolerance
11.3. Memory test and repair
11.4. RTL and gate-leveling modeling, simulation, and verification
11.5. Circuit-level formal verification
11.6. Device/circuit-level simulation tool and methodology
12 Hardware and Embedded Security:
12.1. Hardware-based security
12.2. Detection and prevention of hardware Trojans
12.3. Side-channel attacks, fault attacks and countermeasures
12.4. Design and CAD for security
12.5. Cyberphysical system security
12.6. Nanoelectronic security
12.7. Supply chain security and anti-counterfeiting
13 Emerging Devices, Technologies and Applications:
13.1. Quantum and Ising computing
13.2. Nanotechnology, MEMS
13.3. Biomedical, biochip, and biodata processing
13.4. Edge, fog and cloud computing
13.5. Energy-storage/smart-grid/smart-building design and optimization
13.6. Automotive system design and optimization
13.7. New transistor/device and process technology: spintronic, phase-change, single-electron etc

Other Conferences in Japan

18th International Workshop on Security

Aug 29, 2023 - Aug 31, 2023

Yokohama + Online, Japan

Deadline: Sunday 26 Mar 2023

27th ACM International Systems and Software Product Line Conference

Aug 28, 2023 - Sep 01, 2023

Tokyo, Japan

Deadline: Thursday 13 Apr 2023

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